On Mon, Jan 19, 2026 at 3:21 AM Jonathan Cameron
<[email protected]> wrote:
>
> From: Shiju Jose <[email protected]>
>
> CXL spec rev3.2 section 8.2.10.2.1.1 Table 8-57, general media event
> table has updated with following new fields.
> 1. Advanced Programmable Corrected Memory Error Threshold Event Flags
> 2. Corrected Memory Error Count at Event
> 3. Memory Event Sub-Type
> 4. Support for component ID in the PLDM format.
>
> Add updates for the above spec changes in the CXL general media event
> reporting and QMP command to inject general media event.
>
> In order to have one consistent source of references, update all to
> references for this command to CXL r3.2.
>
> Signed-off-by: Shiju Jose <[email protected]>
> Signed-off-by: Jonathan Cameron <[email protected]>
> ---
> v4: Update the spec reference in the related command to 3.2 as well.
> (Markus)
> v3: Update all references to 3.2 for consistency.
> ---
> qapi/cxl.json | 29 +++++++++++++++++++++--------
> include/hw/cxl/cxl_events.h | 7 +++++--
> hw/mem/cxl_type3.c | 29 +++++++++++++++++++++++++++++
> hw/mem/cxl_type3_stubs.c | 6 ++++++
> 4 files changed, 61 insertions(+), 10 deletions(-)
>
> diff --git a/qapi/cxl.json b/qapi/cxl.json
> index 82001c0591d8..4ff66fc6c16c 100644
> --- a/qapi/cxl.json
> +++ b/qapi/cxl.json
> @@ -64,22 +64,22 @@
> ##
> # @CXLGeneralMediaEvent:
> #
> -# Event record for a General Media Event (CXL r3.0 8.2.9.2.1.1).
> +# Event record for a General Media Event (CXL r3.2 8.2.10.2.1.1).
> #
> # @dpa: Device Physical Address (relative to @path device). Note
> -# lower bits include some flags. See CXL r3.0 Table 8-43 General
> +# lower bits include some flags. See CXL r3.2 Table 8-57 General
> # Media Event Record, Physical Address.
> #
> # @descriptor: Memory Event Descriptor with additional memory event
> -# information. See CXL r3.0 Table 8-43 General Media Event
> +# information. See CXL r3.2 Table 8-57 General Media Event
> # Record, Memory Event Descriptor for bit definitions.
> #
> -# @type: Type of memory event that occurred. See CXL r3.0 Table 8-43
> +# @type: Type of memory event that occurred. See CXL r3.2 Table 8-57
> # General Media Event Record, Memory Event Type for possible
> # values.
> #
> # @transaction-type: Type of first transaction that caused the event
> -# to occur. See CXL r3.0 Table 8-43 General Media Event Record,
> +# to occur. See CXL r3-2 Table 8-57 General Media Event Record,
> # Transaction Type for possible values.
> #
> # @channel: The channel of the memory event location. A channel is an
> @@ -94,6 +94,16 @@
> # @component-id: Device specific component identifier for the event.
> # May describe a field replaceable sub-component of the device.
> #
> +# @is-comp-id-pldm: This flag specifies whether the device-specific
> +# component identifier format follows PLDM.
> +#
> +# @cme-ev-flags: Advanced programmable corrected memory error
> +# threshold event flags.
> +#
> +# @cme-count: Corrected memory error count at event.
> +#
> +# @sub-type: Memory event sub-type.
> +#
> # Since: 8.1
> ##
> { 'struct': 'CXLGeneralMediaEvent',
> @@ -101,13 +111,16 @@
> 'data': { 'dpa': 'uint64', 'descriptor': 'uint8',
> 'type': 'uint8', 'transaction-type': 'uint8',
> '*channel': 'uint8', '*rank': 'uint8',
> - '*device': 'uint32', '*component-id': 'str' } }
> + '*device': 'uint32', '*component-id': 'str',
> + '*is-comp-id-pldm':'bool',
> + '*cme-ev-flags':'uint8', '*cme-count':'uint32',
> + 'sub-type':'uint8' } }
>
> ##
> # @cxl-inject-general-media-event:
> #
> -# Inject an event record for a General Media Event (CXL r3.0
> -# 8.2.9.2.1.1). This event type is reported via one of the event
> +# Inject an event record for a General Media Event (CXL r3.2
> +# 8.2.10.2.1.1). This event type is reported via one of the event
> # logs specified via the log parameter.
> #
> # Since: 8.1
> diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h
> index 4d9cfdb621ea..352f9891bd36 100644
> --- a/include/hw/cxl/cxl_events.h
> +++ b/include/hw/cxl/cxl_events.h
> @@ -115,10 +115,10 @@ typedef struct CXLEventInterruptPolicy {
>
> /*
> * General Media Event Record
> - * CXL r3.1 Section 8.2.9.2.1.1; Table 8-45
> + * CXL r3.2 Section 8.2.10.2.1.1; Table 8-57
> */
> #define CXL_EVENT_GEN_MED_COMP_ID_SIZE 0x10
> -#define CXL_EVENT_GEN_MED_RES_SIZE 0x2e
> +#define CXL_EVENT_GEN_MED_RES_SIZE 0x29
> typedef struct CXLEventGenMedia {
> CXLEventRecordHdr hdr;
> uint64_t phys_addr;
> @@ -130,6 +130,9 @@ typedef struct CXLEventGenMedia {
> uint8_t rank;
> uint8_t device[3];
> uint8_t component_id[CXL_EVENT_GEN_MED_COMP_ID_SIZE];
> + uint8_t cme_ev_flags;
> + uint8_t cme_count[3];
> + uint8_t sub_type;
> uint8_t reserved[CXL_EVENT_GEN_MED_RES_SIZE];
> } QEMU_PACKED CXLEventGenMedia;
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 371bd4dc6ab2..d03a9f0edc29 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1646,6 +1646,11 @@ static const QemuUUID memory_module_uuid = {
> #define CXL_GMER_VALID_RANK BIT(1)
> #define CXL_GMER_VALID_DEVICE BIT(2)
> #define CXL_GMER_VALID_COMPONENT BIT(3)
> +#define CXL_GMER_VALID_COMPONENT_ID_FORMAT BIT(4)
> +
> +#define CXL_GMER_EV_DESC_UCE BIT(0)
> +#define CXL_GMER_EV_DESC_THRESHOLD_EVENT BIT(1)
> +#define CXL_GMER_EV_DESC_POISON_LIST_OVERFLOW_EVENT BIT(2)
>
> static int ct3d_qmp_cxl_event_log_enc(CxlEventLog log)
> {
> @@ -1677,6 +1682,12 @@ void qmp_cxl_inject_general_media_event(const char
> *path, CxlEventLog log,
> bool has_rank, uint8_t rank,
> bool has_device, uint32_t device,
> const char *component_id,
> + bool has_comp_id_pldm,
> + bool is_comp_id_pldm,
> + bool has_cme_ev_flags,
> + uint8_t cme_ev_flags,
> + bool has_cme_count, uint32_t
> cme_count,
> + uint8_t sub_type,
> Error **errp)
> {
> Object *obj = object_resolve_path(path, NULL);
> @@ -1737,10 +1748,28 @@ void qmp_cxl_inject_general_media_event(const char
> *path, CxlEventLog log,
> strncpy((char *)gem.component_id, component_id,
> sizeof(gem.component_id) - 1);
> valid_flags |= CXL_GMER_VALID_COMPONENT;
> + if (has_comp_id_pldm && is_comp_id_pldm) {
> + valid_flags |= CXL_GMER_VALID_COMPONENT_ID_FORMAT;
> + }
> }
>
> stw_le_p(&gem.validity_flags, valid_flags);
>
> + if (has_cme_ev_flags) {
> + gem.cme_ev_flags = cme_ev_flags;
> + } else {
> + gem.cme_ev_flags = 0;
> + }
> +
> + if (has_cme_count) {
> + descriptor |= CXL_GMER_EV_DESC_THRESHOLD_EVENT;
The modification to 'descriptor' here is not written back to gem.descriptor
which was assigned earlier in this function.
Suggest moving gem.descriptor assignment after this block, similar to
how valid_flags is handled in this same function.
> + st24_le_p(gem.cme_count, cme_count);
> + } else {
> + st24_le_p(gem.cme_count, 0);
> + }
> +
> + gem.sub_type = sub_type;
> +
> if (cxl_event_insert(cxlds, enc_log, (CXLEventRecordRaw *)&gem)) {
> cxl_event_irq_assert(ct3d);
> }
> diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c
> index 91b1478114d9..2047e9784694 100644
> --- a/hw/mem/cxl_type3_stubs.c
> +++ b/hw/mem/cxl_type3_stubs.c
> @@ -27,6 +27,12 @@ void qmp_cxl_inject_general_media_event(const char *path,
> CxlEventLog log,
> bool has_rank, uint8_t rank,
> bool has_device, uint32_t device,
> const char *component_id,
> + bool has_comp_id_pldm,
> + bool is_comp_id_pldm,
> + bool has_cme_ev_flags,
> + uint8_t cme_ev_flags,
> + bool has_cme_count, uint32_t
> cme_count,
> + uint8_t sub_type,
> Error **errp) {}
>
> void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log,
> --
> 2.48.1
>
>
