From: Isaku Yamahata <[email protected]> As APIC timer virtualization is supported for KVM nested VMX, support the related feature bits for it.
Signed-off-by: Isaku Yamahata <[email protected]> --- target/i386/cpu.c | 31 ++++++++++++++++++++++++++++++- target/i386/cpu.h | 5 +++++ 2 files changed, 35 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 45f0b80deb02..5b8d8298b404 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1638,7 +1638,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { NULL, NULL, NULL, "vmx-hlt-exit", NULL, "vmx-invlpg-exit", "vmx-mwait-exit", "vmx-rdpmc-exit", "vmx-rdtsc-exit", NULL, NULL, "vmx-cr3-load-noexit", - "vmx-cr3-store-noexit", NULL, NULL, "vmx-cr8-load-exit", + "vmx-cr3-store-noexit", "vmx-tertiary-ctls", NULL, "vmx-cr8-load-exit", "vmx-cr8-store-exit", "vmx-flexpriority", "vmx-vnmi-pending", "vmx-movdr-exit", "vmx-io-exit", "vmx-io-bitmap", NULL, "vmx-mtf", "vmx-msr-bitmap", "vmx-monitor-exit", "vmx-pause-exit", "vmx-secondary-ctls", @@ -1665,6 +1665,31 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { } }, + [FEAT_VMX_TERTIARY_CTLS] = { + .type = MSR_FEATURE_WORD, + .feat_names = { + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + "apic-timer-virt", NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + }, + .msr = { + .index = MSR_IA32_VMX_PROCBASED_CTLS3, + } + }, + [FEAT_VMX_PINBASED_CTLS] = { .type = MSR_FEATURE_WORD, .feat_names = { @@ -1979,6 +2004,10 @@ static FeatureDep feature_dependencies[] = { .from = { FEAT_VMX_SECONDARY_CTLS, VMX_SECONDARY_EXEC_ENABLE_VMFUNC }, .to = { FEAT_VMX_VMFUNC, ~0ull }, }, + { + .from = { FEAT_VMX_PROCBASED_CTLS, VMX_CPU_BASED_ACTIVATE_TERTIARY_CONTROLS }, + .to = { FEAT_VMX_TERTIARY_CTLS, ~0ull }, + }, { .from = { FEAT_8000_0001_ECX, CPUID_EXT3_SVM }, .to = { FEAT_SVM, ~0ull }, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index da5161fc1a50..f073ffce620a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -592,6 +592,7 @@ typedef enum X86Seg { #define MSR_IA32_VMX_TRUE_EXIT_CTLS 0x0000048f #define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490 #define MSR_IA32_VMX_VMFUNC 0x00000491 +#define MSR_IA32_VMX_PROCBASED_CTLS3 0x00000492 #define MSR_APIC_START 0x00000800 #define MSR_APIC_END 0x000008ff @@ -693,6 +694,7 @@ typedef enum FeatureWord { FEAT_PERF_CAPABILITIES, FEAT_VMX_PROCBASED_CTLS, FEAT_VMX_SECONDARY_CTLS, + FEAT_VMX_TERTIARY_CTLS, FEAT_VMX_PINBASED_CTLS, FEAT_VMX_EXIT_CTLS, FEAT_VMX_ENTRY_CTLS, @@ -1370,6 +1372,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define VMX_CPU_BASED_RDTSC_EXITING 0x00001000 #define VMX_CPU_BASED_CR3_LOAD_EXITING 0x00008000 #define VMX_CPU_BASED_CR3_STORE_EXITING 0x00010000 +#define VMX_CPU_BASED_ACTIVATE_TERTIARY_CONTROLS 0x00020000 #define VMX_CPU_BASED_CR8_LOAD_EXITING 0x00080000 #define VMX_CPU_BASED_CR8_STORE_EXITING 0x00100000 #define VMX_CPU_BASED_TPR_SHADOW 0x00200000 @@ -1405,6 +1408,8 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define VMX_SECONDARY_EXEC_TSC_SCALING 0x02000000 #define VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE 0x04000000 +#define VMX_TERTIARY_EXEC_APIC_TIMER_VIRT 0x0000000000000100ull + #define VMX_PIN_BASED_EXT_INTR_MASK 0x00000001 #define VMX_PIN_BASED_NMI_EXITING 0x00000008 #define VMX_PIN_BASED_VIRTUAL_NMIS 0x00000020 base-commit: b377abc220fc53e9cab2aac3c73fc20be6d85eea -- 2.45.2
