From: Laurent Vivier <[email protected]> According to Programmer's Reference Manual, if Dc1 and Dc2 specify the same data register and the comparison fails, memory operand 1 is stored in the data register.
The current helpers wrote Dc1 then Dc2, leaving operand 2 in the shared register. Swap the writeback order for cas2w/cas2l so memory operand 1 wins. Signed-off-by: Laurent Vivier <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Message-ID: <[email protected]> (cherry picked from commit 11dac41f2e830bcd7ba74969dc50f5740e3ce7e7) Signed-off-by: Michael Tokarev <[email protected]> diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index f29ae12af8..b40cc02c65 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -777,8 +777,8 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) env->cc_v = c2; } env->cc_op = CC_OP_CMPW; - env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1); env->dregs[Dc2] = deposit32(env->dregs[Dc2], 0, 16, l2); + env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1); } static void do_cas2l(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2, @@ -839,8 +839,8 @@ static void do_cas2l(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2, env->cc_v = c2; } env->cc_op = CC_OP_CMPL; - env->dregs[Dc1] = l1; env->dregs[Dc2] = l2; + env->dregs[Dc1] = l1; } void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) -- 2.47.3
