From: Nicolas Pitre <[email protected]> Add boolean property for CBQRI and imply it should be enabled for the RISC-V virt machine. Build the CBQRI controllers when RISC-V CBQRI is enabled.
Signed-off-by: Nicolas Pitre <[email protected]> Signed-off-by: Drew Fustini <[email protected]> --- hw/riscv/Kconfig | 4 ++++ hw/riscv/meson.build | 1 + 2 files changed, 5 insertions(+) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index fc9c35bd981e..663cb78b813c 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -1,3 +1,6 @@ +config RISCV_CBQRI + bool + config RISCV_IOMMU bool @@ -68,6 +71,7 @@ config RISCV_VIRT select PLATFORM_BUS select ACPI select ACPI_PCI + imply RISCV_CBQRI config SHAKTI_C bool diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index 2a8d5b136cc4..79e15514b797 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -14,5 +14,6 @@ riscv_ss.add(when: 'CONFIG_RISCV_IOMMU', if_true: files( 'riscv-iommu.c', 'riscv-iommu-pci.c', 'riscv-iommu-sys.c', 'riscv-iommu-hpm.c')) riscv_ss.add(when: 'CONFIG_MICROBLAZE_V', if_true: files('microblaze-v-generic.c')) riscv_ss.add(when: 'CONFIG_XIANGSHAN_KUNMINGHU', if_true: files('xiangshan_kmh.c')) +riscv_ss.add(when: 'CONFIG_RISCV_CBQRI', if_true: files('cbqri_capacity.c', 'cbqri_bandwidth.c')) hw_arch += {'riscv': riscv_ss} -- 2.43.0
