On 2025/12/24 上午11:19, Song Gao wrote:
Exception ADEM/ADEF need update CSR_BADV, ADEF value from env->pc,
ADEM value from the virtual address.

Signed-off-by: Song Gao <[email protected]>
---
  target/loongarch/tcg/tcg_cpu.c | 5 ++++-
  1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c
index c05a06eeb5..53e0970797 100644
--- a/target/loongarch/tcg/tcg_cpu.c
+++ b/target/loongarch/tcg/tcg_cpu.c
@@ -109,10 +109,12 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
          }
          QEMU_FALLTHROUGH;
      case EXCCODE_PIF:
-    case EXCCODE_ADEF:
          cause = cs->exception_index;
          update_badinstr = 0;
          break;
+    case EXCCODE_ADEF:
+        update_badinstr = 0;
+        QEMU_FALLTHROUGH;
I think this modification is unnecessary. CSR_BADV is already set with exception EXCCODE_ADEF/EXCCODE_ADEM.

Regards
Bibo Mao
      case EXCCODE_BCE:
          env->CSR_BADV = env->pc;
          QEMU_FALLTHROUGH;
@@ -225,6 +227,7 @@ static void loongarch_cpu_do_transaction_failed(CPUState 
*cs, hwaddr physaddr,
  {
      CPULoongArchState *env = cpu_env(cs);
+ env->CSR_BADV = addr;
      if (access_type == MMU_INST_FETCH) {
          do_raise_exception(env, EXCCODE_ADEF, retaddr);
      } else {



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