Hi Nabih,

Sure. I will adjust the patch sequence in the next revision.

Best regards,
Kane
> -----Original Message-----
> From: Nabih Estefan <[email protected]>
> Sent: Tuesday, December 16, 2025 3:55 AM
> To: Kane Chen <[email protected]>
> Cc: Cédric Le Goater <[email protected]>; Peter Maydell
> <[email protected]>; Steven Lee <[email protected]>; Troy
> Lee <[email protected]>; Jamin Lin <[email protected]>; Andrew
> Jeffery <[email protected]>; Joel Stanley <[email protected]>;
> open list:ASPEED BMCs <[email protected]>; open list:All patches CC
> here <[email protected]>; Troy Lee <[email protected]>
> Subject: Re: [PATCH v3 00/18] hw/arm/aspeed: AST1700 LTPI support and
> device hookups
> 
> On Wed, Dec 10, 2025 at 10:42 PM Kane Chen
> <[email protected]> wrote:
> >
> > Hi Nabih,
> >
> > Thank you for your review and comments. I will wait a few more days to
> > see if there is additional feedback from others. If you encounter
> > anything unexpected in your local environment, please let me know. I
> > will try to address it in the v4 patch if possible.
> >
> > Best regards,
> > Kane
> 
> Hi Kane,
> 
> I just discovered that our machines seem to fail to boot halfway through the
> stack, but work as expected at the top of the stack. My guess is that the 
> driver
> for the AST1700 doesn't quite know how to deal with half the model existing
> and half of it missing. Is it possible to reorganize the patches so the
> `hw/arm/aspeed: Integrate
> AST1700 device into AST27X0` patch comes last? That way the driver will only
> know of the existence of the AST1700 when the model fully exists in QEMU.
> Mostly to make sure the machine works in any commit and not just at HEAD.
> 
> Thanks!
> Nabih
> 
> 
> > > -----Original Message-----
> > > From: Nabih Estefan <[email protected]>
> > > Sent: Thursday, December 11, 2025 7:02 AM
> > > To: Kane Chen <[email protected]>
> > > Cc: Cédric Le Goater <[email protected]>; Peter Maydell
> > > <[email protected]>; Steven Lee <[email protected]>;
> > > Troy Lee <[email protected]>; Jamin Lin <[email protected]>;
> > > Andrew Jeffery <[email protected]>; Joel Stanley
> > > <[email protected]>; open list:ASPEED BMCs <[email protected]>;
> open
> > > list:All patches CC here <[email protected]>; Troy Lee
> > > <[email protected]>
> > > Subject: Re: [PATCH v3 00/18] hw/arm/aspeed: AST1700 LTPI support
> > > and device hookups
> > >
> > > On Sun, Dec 7, 2025 at 11:45 PM Kane Chen via
> > > <[email protected]>
> > > wrote:
> > > >
> > > > From: Kane-Chen-AS <[email protected]>
> > > >
> > > > Hi all,
> > > >
> > > > LTPI (LVDS Tunneling Protocol & Interface) is defined in the OCP
> > > > DC-SCM
> > > > 2.0 specification (see Figure 2):
> > > >
> https://www.opencompute.org/documents/ocp-dc-scm-2-0-ltpi-ver-1-0-
> > > > pdf
> > > >
> > > > LTPI provides a protocol and physical interface for tunneling
> > > > various low-speed signals between the Host Processor Module (HPM)
> > > > and the Satellite Controller Module (SCM). In Figure 2 of the
> > > > specification, the AST27x0 SoC (left) integrates two LTPI
> > > > controllers, allowing it to connect to up to two AST1700 boards.
> > > > On the other side, the AST1700 consolidates HPM FPGA functions and
> > > > multiple peripheral interfaces (GPIO, UART, I2C, I3C, etc.) onto a 
> > > > single
> board.
> > > >
> > > > Because the AST1700 exposes additional I/O interfaces (GPIO, I2C,
> > > > I3C, and others), it acts as an I/O expander. Once connected over
> > > > LTPI, the
> > > > AST27x0 can control additional downstream devices through this link.
> > > >
> > > > This patch series is based on the SGPIO changes:
> > > > https://lore.kernel.org/qemu-devel/20251106-aspeed-sgpio-v1-0-b026
> > > > 0937
> > > > [email protected]/
> > > >
> > > > It introduces a basic LTPI controller model and wires it into the
> > > > AST27x0 SoC. The series also adds the AST1700-specific LTPI
> > > > expander device and incrementally connects common peripherals on
> > > > the AST1700 model. For the I3C block, which may cause kernel
> > > > crashes, its MMIO region is modeled as an unimplemented device to
> > > > reserve address space and make the missing functionality explicit,
> > > > ensuring stable guest probing.
> > > >
> > > > In the official release images, the AST1700 functions are not
> > > > included by default. To test the AST1700-related functionality,
> > > > please include the following DTS files for probing:
> > > >
> > > https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch
> > > /a
> > > > rm64/boot/dts/aspeed/aspeed-ltpi0.dtsi
> > > >
> > > https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v6.6/arch
> > > /a
> > > > rm64/boot/dts/aspeed/aspeed-ltpi1.dtsi
> > > >
> > > > After including these DTS files in the BMC image, you can verify
> > > > LTPI functionality using the following scenarios:
> > > >
> > > > 1. In U-Boot:
> > > >    Run the ltpi command to trigger the LTPI connection and display the
> > > >    current connection status.
> > > > 2. In BMC Linux:
> > > >    Run i2cdetect -y <16-38> to scan and test the I2C buses exposed by
> > > >    the AST1700.
> > > >
> > > > Any feedback or suggestions are appreciated!
> > > >
> > > > Kane
> > > >
> > >
> > > I left some nit-picky notes on some of the patches, but after fixing
> > > patch 03 everything else seems good. FWIW I brought the whole
> > > patchset into our branch and not only does everything compile
> > > properly, but I can also see and interact with the i2c buses from
> > > the AST1700 in our internal platforms. Will wait for v4 to add the 
> > > reviewed
> and tested tags, but LGTM!
> > >
> > > > ---
> > > >
> > > > ChangeLog
> > > > ---------
> > > > v3:
> > > > - Add PWM model
> > > > - Integrate the SGPIO model
> > > > - Fix I2C test case failure
> > > > - Refine code structure
> > > >
> > > > v2:
> > > > - Separate the AST1700 model into a standalone implementation
> > > > - Refine the mechanism for assigning the AST1700 board number
> > > >
> > > > v1:
> > > > - Initial version
> > > > ---
> > > >
> > > > Kane-Chen-AS (18):
> > > >   hw/misc: Add LTPI controller
> > > >   hw/arm/aspeed: Attach LTPI controller to AST27X0 platform
> > > >   hw/misc: Add basic Aspeed PWM model
> > > >   hw/arm/aspeed: Add AST1700 LTPI expander device model
> > > >   hw/arm/aspeed: Integrate AST1700 device into AST27X0
> > > >   hw/arm/aspeed: Integrate interrupt controller for AST1700
> > > >   hw/arm/aspeed: Attach LTPI controller to AST1700 model
> > > >   hw/arm/aspeed: Attach UART device to AST1700 model
> > > >   hw/arm/aspeed: Attach SRAM device to AST1700 model
> > > >   hw/arm/aspeed: Attach SPI device to AST1700 model
> > > >   hw/arm/aspeed: Attach ADC device to AST1700 model
> > > >   hw/arm/aspeed: Attach SCU device to AST1700 model
> > > >   hw/arm/aspeed: Attach GPIO device to AST1700 model
> > > >   hw/arm/aspeed: attach I2C device to AST1700 model
> > > >   hw/arm/aspeed: Attach WDT device to AST1700 model
> > > >   hw/arm/aspeed: Attach PWM device to AST1700 model
> > > >   hw/arm/aspeed: Attach SGPIOM device to AST1700 model
> > > >   hw/arm/aspeed: Model AST1700 I3C block as unimplemented device
> > > >
> > > >  include/hw/arm/aspeed_ast1700.h |  53 +++++++
> > > >  include/hw/arm/aspeed_soc.h     |  25 ++-
> > > >  include/hw/i2c/aspeed_i2c.h     |   1 +
> > > >  include/hw/intc/aspeed_intc.h   |   2 +
> > > >  include/hw/misc/aspeed_ltpi.h   |  32 ++++
> > > >  include/hw/misc/aspeed_pwm.h    |  31 ++++
> > > >  hw/arm/aspeed_ast1700.c         | 269
> > > ++++++++++++++++++++++++++++++++
> > > >  hw/arm/aspeed_ast27x0.c         | 163 +++++++++++++++++--
> > > >  hw/i2c/aspeed_i2c.c             |  19 ++-
> > > >  hw/intc/aspeed_intc.c           |  60 +++++++
> > > >  hw/misc/aspeed_ltpi.c           | 194
> +++++++++++++++++++++++
> > > >  hw/misc/aspeed_pwm.c            | 121 ++++++++++++++
> > > >  hw/arm/meson.build              |   1 +
> > > >  hw/misc/meson.build             |   2 +
> > > >  hw/misc/trace-events            |   4 +
> > > >  15 files changed, 957 insertions(+), 20 deletions(-)  create mode
> > > > 100644 include/hw/arm/aspeed_ast1700.h  create mode 100644
> > > > include/hw/misc/aspeed_ltpi.h  create mode 100644
> > > > include/hw/misc/aspeed_pwm.h  create mode 100644
> > > > hw/arm/aspeed_ast1700.c  create mode 100644
> hw/misc/aspeed_ltpi.c
> > > > create mode 100644 hw/misc/aspeed_pwm.c
> > > >
> > > > --
> > > > 2.43.0
> > > >
> > > >

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