In order to remove the convenient CPUState::as field, access the vcpu first address space using the cpu_get_address_space() helper.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org> --- target/alpha/helper.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 096eac34458..8819f0b6cb5 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -175,6 +175,7 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr, target_ulong pt, index; int prot = 0; int ret = MM_K_ACV; + AddressSpace *as; /* Handle physical accesses. */ if (mmu_idx == MMU_PHYS_IDX) { @@ -211,6 +212,7 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr, /* Interpret the page table exactly like PALcode does. */ + as = cpu_get_address_space(cs, 0); pt = env->ptbr; /* TODO: rather than using ldq_phys() to read the page table we should @@ -223,7 +225,7 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr, /* L1 page table read. */ index = (addr >> (TARGET_PAGE_BITS + 20)) & 0x3ff; - L1pte = ldq_phys(cs->as, pt + index*8); + L1pte = ldq_phys(as, pt + index*8); if (unlikely((L1pte & PTE_VALID) == 0)) { ret = MM_K_TNV; @@ -236,7 +238,7 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr, /* L2 page table read. */ index = (addr >> (TARGET_PAGE_BITS + 10)) & 0x3ff; - L2pte = ldq_phys(cs->as, pt + index*8); + L2pte = ldq_phys(as, pt + index*8); if (unlikely((L2pte & PTE_VALID) == 0)) { ret = MM_K_TNV; @@ -249,7 +251,7 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr, /* L3 page table read. */ index = (addr >> TARGET_PAGE_BITS) & 0x3ff; - L3pte = ldq_phys(cs->as, pt + index*8); + L3pte = ldq_phys(as, pt + index*8); phys = L3pte >> 32 << TARGET_PAGE_BITS; if (unlikely((L3pte & PTE_VALID) == 0)) { -- 2.51.0