On 8/22/2025 8:11 PM, Mark Cave-Ayland wrote:
All isapc machines must have 32-bit CPUs and have no PCI 64-bit hole so it can
be
hardcoded to 0.
Signed-off-by: Mark Cave-Ayland <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Xiaoyao Li <[email protected]>
---
hw/i386/pc_piix.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index fc94937ad4..7c9f4b78b0 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -444,7 +444,6 @@ static void pc_init_isa(MachineState *machine)
GSIState *gsi_state;
MemoryRegion *ram_memory;
MemoryRegion *rom_memory = system_memory;
- uint64_t hole64_size = 0;
/*
* There is no RAM split for the isapc machine
@@ -480,7 +479,7 @@ static void pc_init_isa(MachineState *machine)
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
- pc_memory_init(pcms, system_memory, rom_memory, hole64_size);
+ pc_memory_init(pcms, system_memory, rom_memory, 0);
} else {
assert(machine->ram_size == x86ms->below_4g_mem_size +
x86ms->above_4g_mem_size);