Similarly noted in libunwind: https://reviews.llvm.org/D38110#895887,
when _ABIO32 / _ABIN32 / _ABI64 are not defined (like on OpenBSD) we
get:

  [666/1234] Compiling C object libsystem.a.p/tcg_tcg-common.c.o
  In file included from ../tcg/tcg-common.c:26:
  In file included from include/tcg/tcg.h:34:
  tcg/mips/tcg-target-reg-bits.h:10:18: warning: '_ABIO32' is not defined, 
evaluates to 0 [-Wundef]
  #if _MIPS_SIM == _ABIO32
                   ^
  tcg/mips/tcg-target-reg-bits.h:12:20: warning: '_ABIN32' is not defined, 
evaluates to 0 [-Wundef]
  #elif _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
                     ^
  2 warnings generated.

Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
 tcg/mips/tcg-target-reg-bits.h           | 5 +++--
 tcg/mips/tcg-target.c.inc                | 5 +++--
 common-user/host/mips/safe-syscall.inc.S | 4 ++--
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/tcg/mips/tcg-target-reg-bits.h b/tcg/mips/tcg-target-reg-bits.h
index 56fe0a725e9..a957d2312f3 100644
--- a/tcg/mips/tcg-target-reg-bits.h
+++ b/tcg/mips/tcg-target-reg-bits.h
@@ -7,9 +7,10 @@
 #ifndef TCG_TARGET_REG_BITS_H
 #define TCG_TARGET_REG_BITS_H
 
-#if _MIPS_SIM == _ABIO32
+#if defined(_ABIO32) && _MIPS_SIM == _ABIO32
 # define TCG_TARGET_REG_BITS 32
-#elif _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
+#elif (defined(_ABIN32) && _MIPS_SIM == _ABIN32) \
+       || (defined(_ABI64) && _MIPS_SIM == _ABI64)
 # define TCG_TARGET_REG_BITS 64
 #else
 # error "Unknown ABI"
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 400eafbab4b..5cdaaaa9286 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -26,7 +26,7 @@
 
 /* used for function call generation */
 #define TCG_TARGET_STACK_ALIGN        16
-#if _MIPS_SIM == _ABIO32
+#if defined(_ABIO32) && _MIPS_SIM == _ABIO32
 # define TCG_TARGET_CALL_STACK_OFFSET 16
 # define TCG_TARGET_CALL_ARG_I64      TCG_CALL_ARG_EVEN
 # define TCG_TARGET_CALL_RET_I128     TCG_CALL_RET_BY_REF
@@ -135,7 +135,8 @@ static const TCGReg tcg_target_call_iarg_regs[] = {
     TCG_REG_A1,
     TCG_REG_A2,
     TCG_REG_A3,
-#if _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
+#if (defined(_ABIN32) && _MIPS_SIM == _ABIN32) \
+     || (defined(_ABI64) && _MIPS_SIM == _ABI64)
     TCG_REG_T0,
     TCG_REG_T1,
     TCG_REG_T2,
diff --git a/common-user/host/mips/safe-syscall.inc.S 
b/common-user/host/mips/safe-syscall.inc.S
index 6a446149704..8857d708dae 100644
--- a/common-user/host/mips/safe-syscall.inc.S
+++ b/common-user/host/mips/safe-syscall.inc.S
@@ -30,7 +30,7 @@
          * arguments being syscall arguments (also 'long').
          */
 
-#if _MIPS_SIM == _ABIO32
+#if defined(_ABIO32) && _MIPS_SIM == _ABIO32
 /* 8 * 4 = 32 for outgoing parameters; 1 * 4 for s0 save; 1 * 4 for align. */
 #define FRAME    40
 #define OFS_S0   32
@@ -47,7 +47,7 @@ NESTED(safe_syscall_base, FRAME, ra)
         .cfi_adjust_cfa_offset FRAME
         REG_S   s0, OFS_S0(sp)
         .cfi_rel_offset s0, OFS_S0
-#if _MIPS_SIM == _ABIO32
+#if defined(_ABIO32) && _MIPS_SIM == _ABIO32
         /*
          * The syscall calling convention is nearly the same as C:
          * we enter with a0 == &signal_pending
-- 
2.51.0


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