There are some enhancement about LoongArch mmu tcg emulation, add new
header file cpu-mmu.h and function loongarch_check_pte(). Function
loongarch_check_pte() can work on both TLB entry and pte entry.
This patchset mainly is code cleanup and enhancement, its main
purpose is to work for hardware page table walk emluation in future.
---
v3 ... v4:
1. Use vaddr type in get_physical_address() and its calling functions
in separate patch.
2. Use MMUAccessType type in function loongarch_map_tlb_entry().
3. Rename structure name mmy_context with MMUContext.
4. Use macro sextract64() to signed-extension 48 bit virtual address
5. Add missing variable assignment in old patch 07.
6. Fix skipping TLB flush logic in old patch 15, it depends on both
pte lo0 and lo1 can be skipped.
v2 ... v3:
1. Track user space page accessed in kernel mode, since mmu idx usage
is different between QEMU TLB and LoongArch TLB emulation.
2. Add 48 bit to 64 bit signed extension conversion with virtual address,
since QEMU TLB use 64 bit address, LoongArch TLB is 48 bit.
3. Optimization with LoongArch TLB update, do not flush QEMU TLB if
updated TLB entry is the same or invalid.
4. Optimization with new LoongArch TLB entry selection, invalid entry
or different ASID with higher priority than the random method.
v1 ... v2:
1. Rename structure name pte_context with mmu_context, since it
can be extended to get DMW or DA mmu idx and window size
2. Add fine-grained tlb flush method
3. Fix some issues in function invalidate_tlb_entry() to flush tlb,
such as bitmap method with mmu idx, page size and address
calculation
---
---
Bibo Mao (19):
target/loongarch: Move some function definition to kvm directory
target/loongarch: Define function loongarch_cpu_post_init as static
target/loongarch: Set page size in TLB entry with STLB
target/loongarch: Add header file cpu-mmu.h
target/loongarch: Add enum type TLBRet definition
target/loongarch: Use vaddr in get_physical_address()
target/loongarch: Use MMUAccessType in loongarch_map_tlb_entry()
target/loongarch: Add common function loongarch_check_pte()
target/loongarch: Use loongarch_check_pte in
loongarch_page_table_walker
target/loongarch: Use MMUConext in loongarch_map_tlb_entry()
target/loongarch: Use MMUContext in loongarch_get_addr_from_tlb
target/loongarch: Use MMUContext in loongarch_map_address()
target/loongarch: Use MMUContext in get_physical_address()
target/loongarch: Track user space address accessed in kernel mode
target/loongarch: Use correct address when flush tlb
target/loongarch: Use mmu idx bitmap method when flush tlb
target/loongarch: Add parameter tlb pointer with fill_tlb_entry
target/loongarch: Reduce TLB flush with helper_tlbwr
target/loongarch: Update TLB index selection method
hw/loongarch/virt.c | 1 +
target/loongarch/cpu-mmu.h | 42 +++++
target/loongarch/cpu.c | 181 +++++++++---------
target/loongarch/cpu.h | 25 +--
target/loongarch/cpu_helper.c | 145 +++++++++-----
target/loongarch/internals.h | 20 --
target/loongarch/kvm/kvm_loongarch.h | 4 +-
target/loongarch/tcg/csr_helper.c | 1 +
target/loongarch/tcg/tcg_loongarch.h | 7 +-
target/loongarch/tcg/tlb_helper.c | 272 +++++++++++++++------------
10 files changed, 399 insertions(+), 299 deletions(-)
create mode 100644 target/loongarch/cpu-mmu.h
base-commit: c017386f28c03a03b8f14444f8671d3d8f7180fe
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2.39.3
