Hi Cédric, Thanks for your review.
I will drop patch 5 and include a documentation update in the next version. Best Regards, Kane > -----Original Message----- > From: Cédric Le Goater <c...@kaod.org> > Sent: Tuesday, July 22, 2025 5:41 PM > To: Kane Chen <kane_c...@aspeedtech.com>; Peter Maydell > <peter.mayd...@linaro.org>; Steven Lee <steven_...@aspeedtech.com>; Troy > Lee <leet...@gmail.com>; Jamin Lin <jamin_...@aspeedtech.com>; Andrew > Jeffery <and...@codeconstruct.com.au>; Joel Stanley <j...@jms.id.au>; > open list:ASPEED BMCs <qemu-...@nongnu.org>; open list:All patches CC > here <qemu-devel@nongnu.org> > Cc: Troy Lee <troy_...@aspeedtech.com> > Subject: Re: [SPAM] [PATCH v4 0/5] ASPEED OTP QEMU model: block backend, > machine alias, SoC integration > > On 7/8/25 07:57, Kane Chen wrote: > > From: Kane-Chen-AS <kane_c...@aspeedtech.com> > > > > This patch series extends the QEMU model for the ASPEED OTP (One-Time > > Programmable) memory device with block backend support and tighter > > integration with the SoC and machine configuration. > > > > The OTP model simulates a simple fuse array, used in ASPEED SoCs for > > secure boot and configuration purposes. The updated model now supports > > loading initial OTP content from a file via the QEMU CLI. > > > > Example usage: > > ./qemu-system-arm \ > > -machine ast2600-evb,otpmem=otp \ > > -blockdev driver=file,filename=otpmem.img,node-name=otp \ > > -global aspeed-otp.drive=otp \ > > ... > > > > ChangeLog > > --------- > > v4: > > - Add a 'drive' property to allow backing OTP data with a block device > > - Expose a machine parameter (`-machine otpmem=XXX`) for convenient > > aliasing of the OTP drive via QOM path > > > Patch 1-4 are fine. Patch 5 is too complex to address and its value is > limited as > explained. > > Could you please send a documentation update : > > > https://gitlab.com/qemu-project/qemu/-/blob/master/docs/system/arm/asp > eed.rst ? > > An extra section after "Other booting options" explaining the OTP backend for > the AST2600 SoC would be welcome. > > Please make sure --enable-docs is configured. > > Thanks, > > C. > > > > > > > > v3: > > - Switched to object_property_set_int() for setting "size" > > - Simplified qdev_realize() error handling by passing errp directly > > - Added "drive" property to OTP model for future extensibility > > > > v2: > > - Rename device from 'aspeed_otpmem' to 'aspeed_otp' and move it to > > hw/nvram/ > > - Move OTP device realization from instance_init to the realize > > function > > - Improve error logging with qemu_log_mask() and remove unused error > > propagation > > > > v1: > > - Initial version > > > > --- > > > > Kane-Chen-AS (5): > > hw/misc/aspeed_otp: Add ASPEED OTP memory device model > > hw/misc/aspeed_sbc: Connect ASPEED OTP memory device to SBC > > hw/arm: Integrate ASPEED OTP memory support into AST2600 SoCs > > hw/misc/aspeed_otp: Add 'drive' property to support block backend > > hw/misc/aspeed_sbc: Add machine parameter to alias OTP drive > > property > > > > include/hw/misc/aspeed_sbc.h | 5 ++ > > include/hw/nvram/aspeed_otp.h | 33 ++++++++++ > > hw/arm/aspeed.c | 20 ++++++ > > hw/arm/aspeed_ast2600.c | 2 +- > > hw/misc/aspeed_sbc.c | 121 > ++++++++++++++++++++++++++++++++++ > > hw/nvram/aspeed_otp.c | 113 > +++++++++++++++++++++++++++++++ > > hw/misc/trace-events | 5 ++ > > hw/nvram/meson.build | 4 ++ > > 8 files changed, 302 insertions(+), 1 deletion(-) > > create mode 100644 include/hw/nvram/aspeed_otp.h > > create mode 100644 hw/nvram/aspeed_otp.c > >
