Hi,
On 21/7/25 23:19, Vacha Bhavsar wrote:
This patch adds big endian support for NEON GDB remote
debugging. It replaces the use of ldq_le_p() with the use of ldq_p() as
explained in the first part of this patch series. Additionally, the order in
which the buffer content is loaded into the CPU struct is switched depending
on target endianness to ensure the most significant bits are always in second
element.
This patch description is what will be committed in the git history.
What do you mean by "as explained in the first part of this patch
series"? This is already the first patch of the series. The "series"
notion will be lost in the git history, so we don't understand what
you meant / referred to.
Anyway, maybe the description can be simplified as:
"Check target endianness and always store the most significant bits
in the second element."
Signed-off-by: Vacha Bhavsar <vacha.bhav...@oss.qualcomm.com>
---
target/arm/gdbstub64.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 64ee9b3b56..8b7f15b920 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -115,8 +115,16 @@ int aarch64_gdb_set_fpu_reg(CPUState *cs, uint8_t *buf,
int reg)
/* 128 bit FP register */
{
uint64_t *q = aa64_vfp_qreg(env, reg);
- q[0] = ldq_le_p(buf);
- q[1] = ldq_le_p(buf + 8);
+
+ if (target_big_endian()){
+ q[1] = ldq_p(buf);
+ q[0] = ldq_p(buf + 8);
+ }
+ else{
Per our docs/devel/style.rst:
} else {
+ q[0] = ldq_p(buf);
+ q[1] = ldq_p(buf + 8);
+ }
+
return 16;
}
case 32:
