From: Yihao Fan <fanyi...@rt-thread.org>
Add the STM32F4spark machine model using the STM32F407 SoC.
Signed-off-by: Yihao Fan <fanyi...@rt-thread.org>
---
MAINTAINERS | 7 +++++++
hw/arm/Kconfig | 6 ++++++
hw/arm/meson.build | 1 +
hw/arm/stm32f4spark.c | 48 +++++++++++++++++++++++++++++++++++++++++++
4 files changed, 62 insertions(+)
create mode 100644 hw/arm/stm32f4spark.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 2744639a8b..0dc7c7bf60 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1030,6 +1030,13 @@ S: Maintained
F: hw/arm/stm32vldiscovery.c
F: docs/system/arm/stm32.rst
+STM32F4SPARK
+M: yanl1229 <yanl1...@rt-thread.org>
+M: Yihao Fan <fanyi...@rt-thread.org>
+L: qemu-...@nongnu.org
+S: Maintained
+F: hw/arm/stm32f4spark.c
+
Versatile Express
M: Peter Maydell <peter.mayd...@linaro.org>
L: qemu-...@nongnu.org
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 4b2f71e6e1..3706a65286 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -234,6 +234,12 @@ config STM32VLDISCOVERY
depends on TCG && ARM
select STM32F100_SOC
+config STM32F4SPARK
+ bool
+ default y
+ depends on TCG && ARM
+ select STM32F407_SOC
+
config STRONGARM
bool
select PXA2XX_TIMER
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 31621060ba..ec63ed7373 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -17,6 +17,7 @@ arm_common_ss.add(when: 'CONFIG_REALVIEW', if_true:
files('realview.c'))
arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c'))
arm_common_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c'))
arm_common_ss.add(when: 'CONFIG_STM32VLDISCOVERY', if_true:
files('stm32vldiscovery.c'))
+arm_common_ss.add(when: 'CONFIG_STM32F4SPARK', if_true:
files('stm32f4spark.c'))
arm_common_ss.add(when: 'CONFIG_ZYNQ', if_true: files('xilinx_zynq.c'))
arm_common_ss.add(when: 'CONFIG_SABRELITE', if_true: files('sabrelite.c'))
diff --git a/hw/arm/stm32f4spark.c b/hw/arm/stm32f4spark.c
new file mode 100644
index 0000000000..e1d656a3f9
--- /dev/null
+++ b/hw/arm/stm32f4spark.c
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/boards.h"
+#include "hw/qdev-properties.h"
+#include "hw/qdev-clock.h"
+#include "qemu/error-report.h"
+#include "hw/arm/stm32f407_soc.h"
+#include "hw/arm/boot.h"
+
+/* stm32f4spark implementation is derived from netduinoplus2 */
+
+/* Main SYSCLK frequency in Hz (72MHz) */
+#define SYSCLK_FRQ 72000000ULL
+
+
+static void stm32f4spark_init(MachineState *machine)
+{
+ DeviceState *dev;
+ Clock *sysclk;
+
+ /* This clock doesn't need migration because it is fixed-frequency */
+ sysclk = clock_new(OBJECT(machine), "SYSCLK");
+ clock_set_hz(sysclk, SYSCLK_FRQ);
+
+ dev = qdev_new(TYPE_STM32F407_SOC);
+ object_property_add_child(OBJECT(machine), "soc", OBJECT(dev));
+ qdev_connect_clock_in(dev, "sysclk", sysclk);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+
+ armv7m_load_kernel(ARM_CPU(first_cpu),
+ machine->kernel_filename,
+ 0, FLASH_SIZE);
+}
+
+static void stm32f4spark_machine_init(MachineClass *mc)
+{
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m4"),
+ NULL
+ };
+
+ mc->desc = "ST RT-spark (Cortex-M4)";
+ mc->init = stm32f4spark_init;
+ mc->valid_cpu_types = valid_cpu_types;
+}
+
+DEFINE_MACHINE("rt-spark", stm32f4spark_machine_init)
--
2.43.0
