RE: [PATCH v8 08/12] hw/arm/virt: Allow user-creatable SMMUv3 dev instantiation

[Shameerali Kolothum Thodi via]

> -----Original Message-----
> From: Nicolin Chen <nicol...@nvidia.com>
> Sent: Friday, July 18, 2025 5:14 AM
> To: Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com>
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> Subject: Re: [PATCH v8 08/12] hw/arm/virt: Allow user-creatable SMMUv3
> dev instantiation
> 
> Hi Shameer,
> 
> On Fri, Jul 11, 2025 at 09:47:45AM +0100, Shameer Kolothum wrote:
> > +static void create_smmuv3_dev_dtb(VirtMachineState *vms,
> > +                                  DeviceState *dev, PCIBus *bus)
> > +{
> > +    PlatformBusDevice *pbus = PLATFORM_BUS_DEVICE(vms-
> >platform_bus_dev);
> > +    SysBusDevice *sbdev = SYS_BUS_DEVICE(dev);
> > +    int irq = platform_bus_get_irqn(pbus, sbdev, 0);
> > +    hwaddr base = platform_bus_get_mmio_addr(pbus, sbdev, 0);
> > +    MachineState *ms = MACHINE(vms);
> > +
> > +    if (!(vms->bootinfo.firmware_loaded && virt_is_acpi_enabled(vms))
> &&
> > +        strcmp("pcie.0", bus->qbus.name)) {
> > +        warn_report("SMMUv3 device only supported with pcie.0 for DT");
> > +        return;
> > +    }
> > +    base += vms->memmap[VIRT_PLATFORM_BUS].base;
> > +    irq += vms->irqmap[VIRT_PLATFORM_BUS];
> 
> The code is fine.
> 
> Just a related question here:
> 
> Do you know where we define the number of IRQs and the range of
> MMIO for the SysBusDevice?
> 
> SMMU has four IRQs. And I see multiple vSMMU instances do have
> correct intervals to their IRQ numbers, but I cannot find where
> the magic is done.

Look for,
#define PLATFORM_BUS_NUM_IRQS 64

So in theory we could have around 16 vSMMU per VM. It depends on
other platform devices specified as well. Do you see a need for more
on a per VM basis? I know there are host systems with large number of
SMMUv3s, but how many a VM will get assigned realistically?

Thanks,
Shameer