On 7/15/25 11:28 AM, Eric Auger wrote:
Hi,
On 7/10/25 3:22 AM, Donald Dutile wrote:
On 7/9/25 3:20 PM, Nicolin Chen wrote:
On Wed, Jul 09, 2025 at 01:55:46PM -0400, Donald Dutile wrote:
+enum {
+ VIOMMU_CAP_STAGE1 = BIT_ULL(0), /* stage1 page table
supported */
+};
Thanks for this work. I am happy to see that we can share the
common code that allocates a NESTING_PARENT in the core using
this flag.
Yet on ARM, a STAGE1 page table isn't always a nested S1, the
hardware accelerated one. More often, it can be just a regular
1-stage translation table via emulated translation code and an
emulated iotlb.
Because the user-created smmuv3 started as 'accelerated smmuv3',
and had been 'de-accelerated' to simply 'user created smmuv3',
I'm looking for some clarification in the above statement/request.
Is the above suppose to reflect that a nested IOMMU has some
hw-acceleration
in its Stage1 implementation?
If so, then call it that: STAGE1_ACCEL.
If it's suppose to represent that an IOMMU has nested/2-stage support,
then the above is a valid cap; -but-, having a nested/2-stage
support IOMMU
doesn't necessarily mean its accelerated.
Well, there are an emulated "nested" mode and an hw-accelerated
"nested" mode in the smmuv3 code, so we had to choose something
like "accel" over "nested".
Here, on the other hand, I think the core using this CAP would
unlikely care about an emulated "nested" mode in the individual
vIOMMU..
So I suggested:
/* hardware-accelerated nested stage-1 page table support */
VIOMMU_CAP_NESTED_S1 = BIT_ULL(0),
which it should be clear IMHO.
If not, maybe go a bit further like "VIOMMU_CAP_HW_NESTED_S1"?
Thanks
Nicolin
If the distinction is hw-based s1 vs emulated-based s1, than
I'd prefer the use of VIOMMU_CAP_HW_NESTED_S1, and avoid the use
VIOMMU_CAP_HW_NESTED_S1 or even VIOMMU_CAP_HW_NESTED look good to me too
Thanks
Eric
+1 to VIOMMU_CAP_HW_NESTED ; the S1 is unnecessary if nested IOMMU is the info
being conveyed.
- Don
of 'accel'/'ACCEL' unless it is an explicitly stated 'acceleration'
feature/option in the SMMU spec.
Thanks,
- Don
