On Tue, Jul 08, 2025 at 04:40:50PM +0100, Shameer Kolothum wrote:
> Currently, pci_setup_iommu() registers IOMMU ops for a given PCIBus.
> However, when retrieving IOMMU ops for a device using
> pci_device_get_iommu_bus_devfn(), the function checks the parent_dev
> and fetches IOMMU ops from the parent device, even if the current
> bus does not have any associated IOMMU ops.
>
> This behavior works for now because QEMU's IOMMU implementations are
> globally scoped, and host bridges rely on the bypass_iommu property
> to skip IOMMU translation when needed.
>
> However, this model will break with the soon to be introduced
> arm-smmuv3 device, which allows users to associate the IOMMU
> with a specific PCIe root complex (e.g., the default pcie.0
> or a pxb-pcie root complex).
>
> For example, consider the following setup with multiple root
> complexes:
>
> -device arm-smmuv3,primary-bus=pcie.0,id=smmuv3.0 \
> ...
> -device pxb-pcie,id=pcie.1,bus_nr=8,bus=pcie.0 \
> -device pcie-root-port,id=pcie.port1,bus=pcie.1 \
> -device virtio-net-pci,bus=pcie.port1
>
> In Qemu, pxb-pcie acts as a special root complex whose parent is
> effectively the default root complex(pcie.0). Hence, though pcie.1
> has no associated SMMUv3 as per above, pci_device_get_iommu_bus_devfn()
> will incorrectly return the IOMMU ops from pcie.0 due to the fallback
> via parent_dev.
>
> To fix this, introduce a new helper pci_setup_iommu_per_bus() that
> explicitly sets the new iommu_per_bus field in the PCIBus structure.
> This helper will be used in a subsequent patch that adds support for
> the new arm-smmuv3 device.
>
> Update pci_device_get_iommu_bus_devfn() to use iommu_per_bus when
> determining the correct IOMMU ops, ensuring accurate behavior for
> per-bus IOMMUs.
>
> Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com>
> Reviewed-by: Eric Auger <eric.au...@redhat.com>
> Tested-by: Nathan Chen <nath...@nvidia.com>
> Tested-by: Eric Auger <eric.au...@redhat.com>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Reviewed-by: Nicolin Chen <nicol...@nvidia.com>
With a nit:
> + /*
> + * When multiple PCI Express Root Buses are defined using pxb-pcie,
> + * the IOMMU configuration may be specific to each root bus. However,
> + * pxb-pcie acts as a special root complex whose parent is
> effectively
> + * the default root complex(pcie.0). Ensure that we retrieve the
> + * correct IOMMU ops(if any) in such cases.
> + */
> + if (pci_bus_is_express(iommu_bus) && pci_bus_is_root(iommu_bus)) {
> + if (!iommu_bus->iommu_per_bus && parent_bus->iommu_per_bus) {
> + break;
> + }
I think this should just check "if (parent_bus->iommu_per_bus)",
which means that the parent's iommu bus is private so not shared
with any other PCI buses.
