> > - /* Descriptor 0x49 depends on CPU family/model, so it is not included > > */ > > + /* > > + * Descriptor 0x49 has 2 cases: > > + * - 2nd-level cache: 4 MByte, 16-way set associative, 64 byte line > > size. > > + * - 3rd-level cache: 4MB, 16-way set associative, 64-byte line size > > + * (Intel Xeon processor MP, Family 0FH, Model 06H). > > + * > > + * When it represents l3, then it depends on CPU family/model. > > Fortunately, > > + * the legacy cache/CPU models don't have such special l3. So, just > > add it > > + * to represent the general l2 case. > > For comments and commit message, we'd better use the capital character > "L2/L3" to represent the 2nd/3rd level cache which is more conventional.
Sure. > Others look good to me. > > Reviewed-by: Dapeng Mi <dapeng1...@linux.intel.com> Thanks!