Re: [PATCH v4 1/8] amd_iommu: Fix Miscellaneous Information Register 0 encoding

[Vasant Hegde]

On 6/17/2025 8:34 PM, Alejandro Jimenez wrote:
> The definitions encoding the maximum Virtual, Physical, and Guest Virtual
> Address sizes supported by the IOMMU are using incorrect offsets i.e. the
> VASize and GVASize offsets are switched. The value in the GVAsize field is
> also modified, since it was incorrectly encoded.
> 
> Cc: qemu-sta...@nongnu.org
> Fixes: d29a09ca6842 ("hw/i386: Introduce AMD IOMMU")
> Co-developed-by: Ethan MILON <ethan.mi...@eviden.com>
> Signed-off-by: Ethan MILON <ethan.mi...@eviden.com>
> Signed-off-by: Alejandro Jimenez <alejandro.j.jime...@oracle.com>

Reviewed-by: Vasant Hegde <vasant.he...@amd.com>

-Vasant