On Tue, 24 Jun 2025 at 03:22, Kane Chen <kane_c...@aspeedtech.com> wrote: > > From: Kane-Chen-AS <kane_c...@aspeedtech.com> > > Introduce a QEMU device model for ASPEED's One-Time Programmable (OTP) > memory. > > This model simulates a word-addressable OTP region used for secure > fuse storage. The OTP memory can operate with an internal memory > buffer. > > The OTP model provides a memory-like interface through a dedicated > AddressSpace, allowing other device models (e.g., SBC) to issue > transactions as if accessing a memory-mapped region. > > Signed-off-by: Kane-Chen-AS <kane_c...@aspeedtech.com> > --- > hw/misc/aspeed_otpmem.c | 85 +++++++++++++++++++++++++++++++++ > hw/misc/meson.build | 1 + > include/hw/misc/aspeed_otpmem.h | 33 +++++++++++++
Our other otp-type devices are in hw/nvram/. You should probably look at whether there's any kind of already existing conventions for these types of devices that this one should follow. (There may be nothing appropriate, but it's worth a look, so we don't end up with half a dozen devices that are all fairly similar but all do things in arbitrarily different ways.) thanks -- PMM
