From: Kane-Chen-AS <kane_c...@aspeedtech.com> This patch series introduces a QEMU model for the ASPEED OTP (One-Time Programmable) memory, along with its integration into the Secure Boot Controller (SBC) and supported SoC (AST2600).
The OTP model emulates a simple fuse array used for secure boot or device configuration, implemented with internal buffers; external file/device support not included in this version. It exposes an AddressSpace to support transaction-based access from controllers like the SBC. This series includes: - OTP memory device implementation - SBC integration with command decoding (READ/PROG) - Direct integration in AST2600 SoC without requiring user parameters **[RFC notice]** This is an RFC submission. This version is primarily intended to gather feedback on how the OTP instance is created, connected, and integrated in the SoC structure. A more finalized version with any requested changes, documentation, and test refinements will follow after review. Any feedback or suggestions are appreciated! --- ChangeLog --------- v6: - remove machine parameter 'otpmem' and BlockBackend - remove alias relationship between machine parameter and BlockBackend - simplify to static internal OTP instance with direct connection in SoC - Submitted as [RFC] to gather feedback on QOM integration approach v5: - Switched to notifier-based late binding between SBC and OTP - Exposed 'otpmem' as a machine parameter using QOM alias mechanism - Added fallback support when no backend is provided - Introduced functional test suite covering multiple init configurations - Submitted as [RFC] to gather feedback on QOM integration approach v4: - Replaces blockdev backend with memory-mapped AddressSpace access - Switches from `-drive` CLI option to `otpmem` machine parameter - Restructures the OTP device under the SBC in the QOM tree v3: - Minor fixes and refinements on top of v2 content v2: - Separated the OTP memory into a standalone QEMU device (`aspeed.otpmem`) - Replaced ad-hoc file handling with standard `-drive` backend integration - Linked OTP to SBC via QOM property for cleaner abstraction - Improved memory bounds checking and irreversible programming logic v1: - Embedded OTP logic in the SBC model and created the backing file internally. --- Kane-Chen-AS (3): hw/misc/aspeed_otp: Add ASPEED OTP memory device model hw/misc/aspeed_sbc: Connect ASPEED OTP memory device to SBC hw/arm: Integrate ASPEED OTP memory support into AST2600 SoCs hw/arm/aspeed_ast2600.c | 2 +- hw/misc/aspeed_otpmem.c | 85 +++++++++++++++++++++++++++++ hw/misc/aspeed_sbc.c | 94 +++++++++++++++++++++++++++++++++ hw/misc/meson.build | 1 + hw/misc/trace-events | 7 +++ include/hw/misc/aspeed_otpmem.h | 33 ++++++++++++ include/hw/misc/aspeed_sbc.h | 5 ++ 7 files changed, 226 insertions(+), 1 deletion(-) create mode 100644 hw/misc/aspeed_otpmem.c create mode 100644 include/hw/misc/aspeed_otpmem.h -- 2.43.0
