We're missing fflags and frm. Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com> --- target/riscv/cpu.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 67e4eda4f9..95d0b88937 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -593,6 +593,8 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) } } if (flags & CPU_DUMP_FPU) { + riscv_dump_csr(env, CSR_FFLAGS, f); + riscv_dump_csr(env, CSR_FRM, f); riscv_dump_csr(env, CSR_FCSR, f); for (i = 0; i < 32; i++) { -- 2.49.0