Hi,

On Sun, Jun 15, 2025 at 11:49 PM Cédric Le Goater <c...@kaod.org> wrote:
>
> Hi
>
> + Jeremy
>
> On 6/13/25 02:03, Joe Komlodi wrote:
> > Hi all,
> >
> > This series adds I3C bus support to QEMU and adds more functionality to the
> > Aspeed I3C controller.
> >
> > This implementation is a basic implementation that introduces IBIs
> > (including hot-join), CCCs, and SDR data transfer. As-is, it doesn't support
> > multi-controller buses or HDR transfers.
> >
> > First we add the I3C bus and controller model. With that added we extend
> > the functionality of the Aspeed I3C controller so it can do transfers
> > and handle IBIs.
> >
> > Next, we add a mock I3C target. It's intended to be a very simple target
> > just to verify that I3C is working on the guest. Internally, we've used it
> > on Linux to verify that i3C devices can be probed and can send/receive data
> > and IBIs.
> > This target is sort of like an EEPROM, and it can also send IBIs upon
> > reception of a user-defined magic number.>
> > Lastly we add  hotplugging support. The hotplugging doesn't do anything too
> > complicated, it just adds the device attempting to hotplug to the bus. It
> > is the device's responsibility to hot-join and go through the DAA process
> > to participate on the bus.
> >
> > Thanks,
> > Joe
> >
> > Joe Komlodi (19):
> >    hw/misc/aspeed_i3c: Move to i3c directory
> >    hw/i3c: Add bus support
> >    hw/i3c: Split DesignWare I3C out of Aspeed I3C
> >    hw/i3c/dw-i3c: Add more register fields
> >    hw/i3c/aspeed_i3c: Add more register fields
> >    hw/i3c/dw-i3c: Add more reset values
> >    hw/i3c/aspeed_i3c: Add register RO field masks
> >    hw/i3c/dw-i3c: Add register RO field masks
> >    hw/i3c/dw-i3c: Treat more registers as read-as-zero
> >    hw/i3c/dw-i3c: Use 32 bits on MMIO writes
> >    hw/i3c/dw-i3c: Add IRQ MMIO behavior
> >    hw/i3c/dw-i3c: Add data TX and RX
> >    hw/i3c/dw-i3c: Add IBI handling
> >    hw/i3c/dw-i3c: Add ctrl MMIO handling
> >    hw/i3c/dw-i3c: Add controller resets
> >    hw/i3c/aspeed: Add I3C bus get function
> >    hw/i3c: Add Mock target
> >    hw/arm/aspeed: Build with I3C_DEVICES
> >    hw/i3c: Add hotplug support
> >
> >   hw/Kconfig                            |    1 +
> >   hw/arm/Kconfig                        |    3 +
> >   hw/i3c/Kconfig                        |   15 +
> >   hw/i3c/aspeed_i3c.c                   |  261 ++++
> >   hw/i3c/core.c                         |  669 +++++++++
> >   hw/i3c/dw-i3c.c                       | 1881 +++++++++++++++++++++++++
> >   hw/i3c/meson.build                    |    6 +
> >   hw/i3c/mock-i3c-target.c              |  311 ++++
> >   hw/i3c/trace-events                   |   47 +
> >   hw/i3c/trace.h                        |    2 +
> >   hw/meson.build                        |    1 +
> >   hw/misc/aspeed_i3c.c                  |  383 -----
> >   hw/misc/meson.build                   |    1 -
> >   hw/misc/trace-events                  |    6 -
> >   include/hw/arm/aspeed_soc.h           |    2 +-
> >   include/hw/{misc => i3c}/aspeed_i3c.h |   22 +-
> >   include/hw/i3c/dw-i3c.h               |  201 +++
> >   include/hw/i3c/i3c.h                  |  277 ++++
> >   include/hw/i3c/mock-i3c-target.h      |   52 +
> >   meson.build                           |    1 +
> >   20 files changed, 3735 insertions(+), 407 deletions(-)
> >   create mode 100644 hw/i3c/Kconfig
> >   create mode 100644 hw/i3c/aspeed_i3c.c
> >   create mode 100644 hw/i3c/core.c
> >   create mode 100644 hw/i3c/dw-i3c.c
> >   create mode 100644 hw/i3c/meson.build
> >   create mode 100644 hw/i3c/mock-i3c-target.c
> >   create mode 100644 hw/i3c/trace-events
> >   create mode 100644 hw/i3c/trace.h
> >   delete mode 100644 hw/misc/aspeed_i3c.c
> >   rename include/hw/{misc => i3c}/aspeed_i3c.h (63%)
> >   create mode 100644 include/hw/i3c/dw-i3c.h
> >   create mode 100644 include/hw/i3c/i3c.h
> >   create mode 100644 include/hw/i3c/mock-i3c-target.h
> >
>
> This lacks a MAINTAINER.

Ah, right. I can add that in v2. I can add myself to it, is there
anyone else who should be on it?
>
> Could you please provide functional tests ? some with a standard I2C
> device attached to an I3C legacy bus too.

I can work on that, probably v2 or v3 depending on how long it takes.
>
> Are there any other stakeholders interested in the I3C to get feedback ?
>
> Have there been any changes since:
>
>    
> https://lore.kernel.org/qemu-devel/20230331010131.1412571-1-koml...@google.com/
>
Nothing too substantial. I decided not to upstream remote I3C since
it's unlikely it would be useful upstream.
I think there might be a couple bugfixes in the DwC controller as
well, but I don't remember off-hand what they were. If there were any,
they were all minor.

Thanks,
Joe

> Thanks,
>
> C.

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