Same as v4, with suggestion from Richard to avoid parentheses---which also
fixes the issue with kvm-cpu.c reported by Daniel Barboza. KVM/RISC-V is
now covered in CI and passes with this version.
Paolo
Paolo Bonzini (26):
target/riscv: assert argument to set_satp_mode_max_supported is valid
target/riscv: cpu: store max SATP mode as a single integer
target/riscv: update max_satp_mode based on QOM properties
target/riscv: remove supported from RISCVSATPMap
target/riscv: move satp_mode.{map,init} out of CPUConfig
target/riscv: introduce RISCVCPUDef
target/riscv: store RISCVCPUDef struct directly in the class
target/riscv: merge riscv_cpu_class_init with the class_base function
target/riscv: move RISCVCPUConfig fields to a header file
target/riscv: include default value in cpu_cfg_fields.h.inc
target/riscv: add more RISCVCPUDef fields
target/riscv: convert abstract CPU classes to RISCVCPUDef
target/riscv: convert profile CPU models to RISCVCPUDef
target/riscv: convert bare CPU models to RISCVCPUDef
target/riscv: convert dynamic CPU models to RISCVCPUDef
target/riscv: convert SiFive E CPU models to RISCVCPUDef
target/riscv: convert ibex CPU models to RISCVCPUDef
target/riscv: convert SiFive U models to RISCVCPUDef
target/riscv: th: make CSR insertion test a bit more intuitive
target/riscv: generalize custom CSR functionality
target/riscv: convert TT C906 to RISCVCPUDef
target/riscv: convert TT Ascalon to RISCVCPUDef
target/riscv: convert Ventana V1 to RISCVCPUDef
target/riscv: convert Xiangshan Nanhu to RISCVCPUDef
target/riscv: remove .instance_post_init
qom: reverse order of instance_post_init calls
include/qom/object.h | 3 +-
target/riscv/cpu-qom.h | 2 +
target/riscv/cpu.h | 42 +-
target/riscv/cpu_cfg.h | 178 +----
target/riscv/cpu_cfg_fields.h.inc | 170 +++++
hw/riscv/boot.c | 2 +-
hw/riscv/virt-acpi-build.c | 14 +-
hw/riscv/virt.c | 5 +-
qom/object.c | 8 +-
target/riscv/cpu.c | 1014 +++++++++++++----------------
target/riscv/csr.c | 11 +-
target/riscv/gdbstub.c | 6 +-
target/riscv/kvm/kvm-cpu.c | 27 +-
target/riscv/machine.c | 2 +-
target/riscv/tcg/tcg-cpu.c | 13 +-
target/riscv/th_csr.c | 30 +-
target/riscv/translate.c | 2 +-
17 files changed, 734 insertions(+), 795 deletions(-)
create mode 100644 target/riscv/cpu_cfg_fields.h.inc
--
2.49.0
