PMCNTENCLR_EL0 and PMINTENCLR_EL1 clears written bits so we need an alternative raw write functions, which will be used to copy KVM kernel coprocessor state into userspace.
Signed-off-by: Akihiko Odaki <[email protected]> --- target/arm/helper.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index f0ead22937bf..30883cd3a989 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1907,7 +1907,8 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { .fgt = FGT_PMCNTEN, .type = ARM_CP_ALIAS | ARM_CP_IO, .fieldoffset = offsetof(CPUARMState, cp15.c9_pmcnten), - .writefn = pmcntenclr_write }, + .writefn = pmcntenclr_write, + .raw_writefn = raw_write }, { .name = "PMOVSR", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 3, .access = PL0_RW, .type = ARM_CP_IO, .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pmovsr), @@ -2033,7 +2034,8 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { .fgt = FGT_PMINTEN, .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW, .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten), - .writefn = pmintenclr_write }, + .writefn = pmintenclr_write, + .raw_writefn = raw_write }, { .name = "CCSIDR", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .crn = 0, .crm = 0, .opc1 = 1, .opc2 = 0, .access = PL1_R, --- base-commit: 825b96dbcee23d134b691fc75618b59c5f53da32 change-id: 20250313-clr-6a34831628b7 Best regards, -- Akihiko Odaki <[email protected]>
