Background ========== Currently the base CXL support for arm platforms is only on Jonathan's patches[1] which have not yet merged into upstream. Some platform like SBSA-REF can be more like a real machine, thus the support of cxl could be meaningful. However, the pxb-cxl-host realization on this platform seems not satisfying their requirements[2].
New CXL HOST design =================== This work defines a new cxl host bridge type (TYPE_CXL_HOST). This could be considered as a prototype of an independent cxl host bridge which combines gpex features (ecam, mmio windows & irq) and pxb-cxl features(CHBCR) at meanwhile. The root bus path of CXL_HOST is "0001:00", that would not affect the original pcie host topology. In the previous, the pxb-cxl-host with any cxl root ports and cxl endpoint devices would occupy the BDF number of the original pcie domain. This new type provide a solution to resolve the problem. Also the CXLFixedWindow struct adds a new member 'target_chb' to record the target list of CXLHostBridge. And necessary is to adjust the logic of 'cxl_cfmws_find_device' and 'cxl_fmws_link_targets' to allow different types of cxl host bridge. Move 'cxl_get_hb_cstate' & 'cxl_get_hb_passthrough' from pxb code into cxl-host code. Link: [1]: https://lore.kernel.org/linux-cxl/20220616141950.23374-1-jonathan.came...@huawei.com/ [2]: https://lists.nongnu.org/archive/html/qemu-arm/2024-11/msg00522.html Yuquan Wang (1): cxl/cxl-host: Support creation of a new CXL Host Bridge hw/cxl/cxl-host-stubs.c | 2 + hw/cxl/cxl-host.c | 220 ++++++++++++++++++++++++++-- hw/pci-bridge/pci_expander_bridge.c | 20 +-- include/hw/cxl/cxl.h | 23 +++ include/hw/cxl/cxl_component.h | 4 +- include/hw/cxl/cxl_host.h | 6 + 6 files changed, 242 insertions(+), 33 deletions(-) -- 2.34.1
