On Mon, Sep 30, 2024 at 11:12 AM Philippe Mathieu-Daudé
<phi...@linaro.org> wrote:
>
> Extract the implicit MO_TE definition in order to replace
> it by runtime variable in the next commit.
>
> Mechanical change using:
>
>   $ for n in UW UL UQ UO SW SL SQ; do \
>       sed -i -e "s/MO_TE$n/MO_TE | MO_$n/" \
>            $(git grep -l MO_TE$n target/mips); \
>     done
>
> Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
> ---
>  target/mips/tcg/mxu_translate.c           |   8 +-
>  target/mips/tcg/translate.c               | 120 +++++++++++-----------
>  target/mips/tcg/tx79_translate.c          |   8 +-
>  target/mips/tcg/micromips_translate.c.inc |  22 ++--
>  target/mips/tcg/mips16e_translate.c.inc   |  12 +--
>  target/mips/tcg/nanomips_translate.c.inc  |  32 +++---
>  6 files changed, 101 insertions(+), 101 deletions(-)
>
> diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translate.c
> index c517258ac5..b221f7a4a0 100644
> --- a/target/mips/tcg/mxu_translate.c
> +++ b/target/mips/tcg/mxu_translate.c
> @@ -1533,7 +1533,7 @@ static void gen_mxu_s32ldxx(DisasContext *ctx, bool 
> reversed, bool postinc)
>      tcg_gen_add_tl(t0, t0, t1);
>
>      tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx,
> -                       (MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
> +                       (MO_TE | MO_SL ^ (reversed ? MO_BSWAP : 0)) |

Hmm either I need to use parenthesis here or swap the arguments.

>                          ctx->default_tcg_memop_mask);
>      gen_store_mxu_gpr(t1, XRa);
>
> @@ -1569,7 +1569,7 @@ static void gen_mxu_s32stxx(DisasContext *ctx, bool 
> reversed, bool postinc)
>
>      gen_load_mxu_gpr(t1, XRa);
>      tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx,
> -                       (MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
> +                       (MO_TE | MO_SL ^ (reversed ? MO_BSWAP : 0)) |
>                          ctx->default_tcg_memop_mask);
>
>      if (postinc) {
> @@ -1605,7 +1605,7 @@ static void gen_mxu_s32ldxvx(DisasContext *ctx, bool 
> reversed,
>      tcg_gen_add_tl(t0, t0, t1);
>
>      tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx,
> -                       (MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
> +                       (MO_TE | MO_SL ^ (reversed ? MO_BSWAP : 0)) |
>                          ctx->default_tcg_memop_mask);
>      gen_store_mxu_gpr(t1, XRa);
>
> @@ -1675,7 +1675,7 @@ static void gen_mxu_s32stxvx(DisasContext *ctx, bool 
> reversed,
>
>      gen_load_mxu_gpr(t1, XRa);
>      tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx,
> -                       (MO_TESL ^ (reversed ? MO_BSWAP : 0)) |
> +                       (MO_TE | MO_SL ^ (reversed ? MO_BSWAP : 0)) |
>                          ctx->default_tcg_memop_mask);
>

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