In XIVE Gen 2 there are many operations that were not modeled and are needed for PowerVM. These changes are associated with the following Thread Interrupt Management Area subjects: - OS context - Thread context - Pulling contexts to 'cache lines' - Pool targets - Enhaced trace data for XIVE Gen2
Frederic Barrat (4): pnv/xive2: Define OGEN field in the TIMA ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line" ppc/xive2: Dump more NVP state with 'info pic' ppc/xive2: Dump the VP-group and crowd tables with 'info pic' Glenn Miles (7): pnv/xive2: Support for "OS LGS Push" TIMA operation ppc/xive2: Allow 1-byte write of Target field in TIMA ppc/xive2: Support "Pull Thread Context to Register" operation ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line" pnv/xive: Add special handling for pool targets pnv/xive: Update PIPR when updating CPPR pnv/xive2: TIMA support for 8-byte OS context push for PHYP Michael Kowal (2): pnv/xive: TIMA patch sets pre-req alignment and formatting changes pnv/xive2: TIMA CI ops using alternative offsets or byte lengths include/hw/ppc/xive.h | 2 +- include/hw/ppc/xive2.h | 18 ++ include/hw/ppc/xive2_regs.h | 9 + include/hw/ppc/xive_regs.h | 45 +++-- hw/intc/pnv_xive2.c | 56 +++++- hw/intc/xive.c | 201 +++++++++++++++++----- hw/intc/xive2.c | 332 +++++++++++++++++++++++++++++++----- 7 files changed, 555 insertions(+), 108 deletions(-) -- 2.43.0
