On 7/8/24 07:25, Peter Maydell wrote:
On Wed, 3 Jul 2024 at 00:43, Richard Henderson <richard.hender...@linaro.org> wrote:While looking into Zoltan's attempt to speed up ppc64 DCBZ (data cache block set to zero), I wondered what AArch64 was doing differently. It turned out that Arm is the only user of tlb_vaddr_to_host.riscv also seems to use it in vext_ldff(), fwiw.
So it does, followed by a second probe for read. That's quite wrong... But you're right that it has a similar race condition. r~
