On Fri, 3 May 2024 at 16:35, Zenghui Yu <[email protected]> wrote: > > We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so > we fail to get the expected ARMCPRegInfo from cp_regs hash table with the > wrong key. > > Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux > guest can properly detect FEAT_SSBS2 on my M1 HW. > > All DBG{B,W}{V,C}R_EL1 registers are also wrongly encoded with op0 == 14. > It happens to work because HVF_SYSREG(CRn, CRm, 14, op1, op2) equals to > HVF_SYSREG(CRn, CRm, 2, op1, op2), by definition. But we shouldn't rely on > it. > > Fixes: a1477da3ddeb ("hvf: Add Apple Silicon support") > Signed-off-by: Zenghui Yu <[email protected]> > ---
Applied to target-arm.next, thanks. I threw in a cc:stable tag, though it doesn't sound like the consequences of the bug are very significant. -- PMM
