On Mon, Dec 11, 2023 at 01:57:42PM +0000, Peter Maydell wrote: > On Mon, 11 Dec 2023 at 07:13, Tomoyuki HIROSE > <[email protected]> wrote: > > > > According to xHCI spec rev 1.2, unaligned access to xHCI Host > > Controller Capability Registers is not prohibited. In Addition, the > > limit of access size is also unspecified. Actually, some real devices > > allow unaligned access and 8-byte access to these registers. > > This commit makes it possible to unaligned access and 8-byte access > > to Host Controller Capability Registers. > > We should definitely look at fixing the unaligned access > stuff, but the linked bug report is not trying to do an > unaligned access -- it wants to do a 2-byte read from offset 2, > which is aligned.
IIUC the issue is the xHCI xhci_cap_ops defines impl.min_access_size=4. Then it'll be enlarged to 4 bytes read on offset 0x2. IOW, I think it'll also work if xhci_cap_ops can support impl.min_access_size=2, however I don't know whether that can be more than that register, so that the memory patch is still a more generic approach. Thanks, -- Peter Xu
