From: Zhenzhong Duan <[email protected]> s->smmu_pcibus_by_bus_num is a SMMUPciBus pointer cache indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm.
This could lead to smmu_iommu_mr() providing the wrong iommu MR. Suggested-by: Eric Auger <[email protected]> Signed-off-by: Zhenzhong Duan <[email protected]> Message-Id: <[email protected]> Reviewed-by: Eric Auger <[email protected]> Tested-by: Eric Auger <[email protected]> Reviewed-by: Michael S. Tsirkin <[email protected]> Signed-off-by: Michael S. Tsirkin <[email protected]> (cherry picked from commit 8a6b3f4dc95a064e88adaca86374108da0ecb38d) Signed-off-by: Michael Tokarev <[email protected]> diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index bbca3a8db3..7abc166eb3 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -529,6 +529,8 @@ static void smmu_base_reset(DeviceState *dev) { SMMUState *s = ARM_SMMU(dev); + memset(s->smmu_pcibus_by_bus_num, 0, sizeof(s->smmu_pcibus_by_bus_num)); + g_hash_table_remove_all(s->configs); g_hash_table_remove_all(s->iotlb); } -- 2.39.2
