Move them out of CPUSH4State so that they are not zero'ed on reset.
Signed-off-by: Andreas Färber <[email protected]>
---
hw/sh7750.c | 5 +++--
target-sh4/cpu-qom.h | 3 +++
target-sh4/cpu.c | 3 ++-
target-sh4/cpu.h | 3 ---
target-sh4/translate.c | 3 ++-
5 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/hw/sh7750.c b/hw/sh7750.c
index e712928..c7e653c 100644
--- a/hw/sh7750.c
+++ b/hw/sh7750.c
@@ -77,10 +77,11 @@ typedef struct SH7750State {
struct intc_desc intc;
} SH7750State;
-static inline int has_bcr3_and_bcr4(SH7750State * s)
+static inline int has_bcr3_and_bcr4(SH7750State *s)
{
- return (s->cpu->features & SH_FEATURE_BCR3_AND_BCR4);
+ return sh_env_get_cpu(s->cpu)->features & SH_FEATURE_BCR3_AND_BCR4;
}
+
/**********************************************************************
I/O ports
**********************************************************************/
diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h
index 1441328..c8cc63e 100644
--- a/target-sh4/cpu-qom.h
+++ b/target-sh4/cpu-qom.h
@@ -55,6 +55,7 @@ typedef struct SuperHCPUClass {
/**
* SuperHCPU:
+ * @features: CPU feature flags, see #sh_features.
* @env: Legacy CPU state.
*
* A SuperH CPU.
@@ -64,6 +65,8 @@ typedef struct SuperHCPU {
CPUState parent_obj;
/*< public >*/
+ uint32_t features;
+
CPUSH4State env;
} SuperHCPU;
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
index 68034b6..d1bd156 100644
--- a/target-sh4/cpu.c
+++ b/target-sh4/cpu.c
@@ -94,6 +94,8 @@ static void superh_cpu_initfn(Object *obj)
SuperHCPUClass *klass = SUPERH_CPU_GET_CLASS(cpu);
CPUSH4State *env = &cpu->env;
+ cpu->features = klass->features;
+
memset(env, 0, sizeof(CPUSH4State));
env->cpu_model_str = object_get_typename(obj);
cpu_exec_init(env);
@@ -102,7 +104,6 @@ static void superh_cpu_initfn(Object *obj)
env->pvr = klass->pvr;
env->prr = klass->prr;
env->cvr = klass->cvr;
- env->features = klass->features;
env->movcal_backup_tail = &(env->movcal_backup);
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index ec5e6cf..ee8ba5e 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -157,9 +157,6 @@ typedef struct CPUSH4State {
/* float point status register */
float_status fp_status;
- /* The features that we should emulate. See sh_features above. */
- uint32_t features;
-
/* Those belong to the specific unit (SH7750) but are handled here */
uint32_t mmucr; /* MMU control register */
uint32_t pteh; /* page table entry high register */
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 71434d0..d43cd8c 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1876,6 +1876,7 @@ static inline void
gen_intermediate_code_internal(CPUSH4State * env, TranslationBlock * tb,
int search_pc)
{
+ SuperHCPU *cpu = sh_env_get_cpu(env);
DisasContext ctx;
target_ulong pc_start;
static uint16_t *gen_opc_end;
@@ -1897,7 +1898,7 @@ gen_intermediate_code_internal(CPUSH4State * env,
TranslationBlock * tb,
ctx.delayed_pc = -1; /* use delayed pc from env pointer */
ctx.tb = tb;
ctx.singlestep_enabled = env->singlestep_enabled;
- ctx.features = env->features;
+ ctx.features = cpu->features;
ctx.has_movcal = (tb->flags & TB_FLAG_PENDING_MOVCA);
ii = -1;
--
1.7.7