On Thu, 4 Dec 2025 at 09:35, Corvin Köhne <[email protected]> wrote: > > From: YannickV <[email protected]> > > The is25lp016d has 4 Block Write Protect Bits. BP3 specifies > whether the upper or lower range should be protected. Therefore, > we add the HAS_SR_TB flag to the is25lp016d flags. > > Signed-off-by: YannickV <[email protected]> > --- > hw/block/m25p80.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c > index a5336d92ff..1df223ee81 100644 > --- a/hw/block/m25p80.c > +++ b/hw/block/m25p80.c > @@ -217,7 +217,8 @@ static const FlashPartInfo known_devices[] = { > /* ISSI */ > { INFO("is25lq040b", 0x9d4013, 0, 64 << 10, 8, ER_4K) }, > { INFO("is25lp080d", 0x9d6014, 0, 64 << 10, 16, ER_4K) }, > - { INFO("is25lp016d", 0x9d6015, 0, 64 << 10, 32, ER_4K) }, > + { INFO("is25lp016d", 0x9d6015, 0, 64 << 10, 32, > + ER_4K | HAS_SR_TB) }, > { INFO("is25lp032", 0x9d6016, 0, 64 << 10, 64, ER_4K) }, > { INFO("is25lp064", 0x9d6017, 0, 64 << 10, 128, ER_4K) }, > { INFO("is25lp128", 0x9d6018, 0, 64 << 10, 256, ER_4K) }, > -- Reviewed-by: Peter Maydell <[email protected]>
thanks -- PMM
