Good quality in your port, I would even say if this is your first port... too good to be true, must find something to criticize... Your mail has poor formatting, +80 chars. long on some lines. (?) Just a joke, good work, clearly you took the job of porting this seriously enough, good luck with the rest of the dependencies of Qflow!
Cheers. Elias. 2018-07-27 11:11 GMT-03:00 Alessandro DE LAURENZIS <jus...@atlantide.t28.net>: > Dear ports@ readers, > > as first follow-up of my previous e-mail, enclosed please find the port for > abc [1]: > > [... snip ...] > ABC: A System for Sequential Synthesis and Verification > > ABC is a growing software system for synthesis and verification of binary > sequential logic circuits appearing in synchronous hardware designs. ABC > combines scalable logic optimization based on And-Inverter Graphs (AIGs), > optimal-delay DAG-based technology mapping for look-up tables and standard > cells, and innovative algorithms for sequential synthesis and verification. > [... snip ...] > > It compiles flawlessly and runs as expected (tested on amd64 only, for a > limited set of test-cases, no test suite available). > > We only need to patch the Makefile, in order to correctly set the compiler > option when the __OpenBSD__ identifier is found. > > Please consider that this is my first attempt to build a quality level port, > so please have a careful look at it and let me know your comments. > > Of course, I step-up for maintainership. > > [1] https://people.eecs.berkeley.edu/~alanmi/abc/ > > -- > Alessandro DE LAURENZIS > [mailto:jus...@atlantide.t28.net] > Web: http://www.atlantide.t28.net > LinkedIn: http://it.linkedin.com/in/delaurenzis
