Sebastien, Robert,
I'd like to backport to llvm-22
https://github.com/llvm/llvm-project/commit/1b9fea021840f17c41ea980300d0fc45e7285909
which fixes a "compiler stuck" issue in libggml.
I think it should go to base version of llvm as well.
Here the diff for ports@ part.
Ok?
Index: Makefile
===================================================================
RCS file: /home/cvs/ports/devel/llvm/22/Makefile,v
diff -u -p -r1.6 Makefile
--- Makefile 6 May 2026 12:47:03 -0000 1.6
+++ Makefile 20 May 2026 11:01:28 -0000
@@ -5,6 +5,8 @@ LLVM_MAJOR = 22
LLVM_VERSION = ${LLVM_MAJOR}.1.5
LLVM_PKGSPEC = >=22,<23
+REVISION-main = 0
+
SHARED_LIBS += LLVM 0.0 \
LTO 0.0 \
Remarks 0.0 \
Index: patches/patch-llvm_lib_Target_X86_X86ISelLowering_cpp
===================================================================
RCS file: patches/patch-llvm_lib_Target_X86_X86ISelLowering_cpp
diff -N patches/patch-llvm_lib_Target_X86_X86ISelLowering_cpp
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-llvm_lib_Target_X86_X86ISelLowering_cpp 20 May 2026
10:59:58 -0000
@@ -0,0 +1,31 @@
+Backport
https://github.com/llvm/llvm-project/commit/1b9fea021840f17c41ea980300d0fc45e7285909
+
+Index: llvm/lib/Target/X86/X86ISelLowering.cpp
+--- llvm/lib/Target/X86/X86ISelLowering.cpp.orig
++++ llvm/lib/Target/X86/X86ISelLowering.cpp
+@@ -18004,9 +18004,12 @@ static SDValue lowerV64I8Shuffle(const SDLoc &DL, Arra
+
+ // Try to create an in-lane repeating shuffle mask and then shuffle the
+ // results into the target lanes.
+- if (SDValue V = lowerShuffleAsRepeatedMaskAndLanePermute(
+- DL, MVT::v64i8, V1, V2, Mask, Subtarget, DAG))
+- return V;
++ // FIXME: Avoid on VBMI targets as the post lane permute often interferes
++ // with shuffle combining (should be fixed by topological DAG sorting).
++ if (!Subtarget.hasVBMI())
++ if (SDValue V = lowerShuffleAsRepeatedMaskAndLanePermute(
++ DL, MVT::v64i8, V1, V2, Mask, Subtarget, DAG))
++ return V;
+
+ if (SDValue Result = lowerShuffleAsLanePermuteAndPermute(
+ DL, MVT::v64i8, V1, V2, Mask, DAG, Subtarget))
+@@ -18041,7 +18044,8 @@ static SDValue lowerV64I8Shuffle(const SDLoc &DL, Arra
+ if (Subtarget.hasVBMI())
+ return lowerShuffleWithPERMV(DL, MVT::v64i8, Mask, V1, V2, Subtarget,
DAG);
+
+- return splitAndLowerShuffle(DL, MVT::v64i8, V1, V2, Mask, DAG,
/*SimpleOnly*/ false);
++ return splitAndLowerShuffle(DL, MVT::v64i8, V1, V2, Mask, DAG,
++ /*SimpleOnly*/ false);
+ }
+
+ /// High-level routine to lower various 512-bit x86 vector shuffles.
--
wbr, Kirill
