A first cut at porting Icarus Verilog: pkg/DESCR: Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate an intermediate form called vvp assembly. This intermediate form is executed by the ``vvp'' command. For synthesis, the compiler generates netlists in the desired format.
Please have a look and flog me appropriately http://pintday.org/kjell/hack/iverilog-0.8.5.tgz Thanks! -kj
