ok On 26/11/23 15:15 +0100, Tobias Heider wrote: > Here's the same lld fix I sent to tech earlier. > This is needed to make chromium work on arm64 machines with bti. > > Previous mail: > https://marc.info/?l=openbsd-tech&m=170099852707132&w=2 > > Upstream fix: > https://github.com/llvm/llvm-project/commit/60827df765156cee6cca3dc5049388dde9dac1c0 > > ok? > > Index: Makefile > =================================================================== > RCS file: /cvs/ports/devel/llvm/16/Makefile,v > diff -u -p -r1.20 Makefile > --- Makefile 13 Nov 2023 13:57:37 -0000 1.20 > +++ Makefile 26 Nov 2023 14:11:32 -0000 > @@ -2,7 +2,7 @@ LLVM_MAJOR = 16 > LLVM_VERSION = ${LLVM_MAJOR}.0.6 > LLVM_PKGSPEC = >=16,<17 > > -REVISION-main = 18 > +REVISION-main = 19 > REVISION-lldb = 3 > REVISION-python = 1 > > Index: patches/patch-lld_ELF_Arch_AArch64_cpp > =================================================================== > RCS file: /cvs/ports/devel/llvm/16/patches/patch-lld_ELF_Arch_AArch64_cpp,v > diff -u -p -r1.1.1.1 patch-lld_ELF_Arch_AArch64_cpp > --- patches/patch-lld_ELF_Arch_AArch64_cpp 3 Sep 2023 16:00:03 -0000 > 1.1.1.1 > +++ patches/patch-lld_ELF_Arch_AArch64_cpp 26 Nov 2023 14:11:32 -0000 > @@ -13,7 +13,17 @@ Index: lld/ELF/Arch/AArch64.cpp > // A BTI (Branch Target Indicator) Plt Entry is only required if the > // address of the PLT entry can be taken by the program, which permits an > // indirect jump to the PLT entry. This can happen when the address > -@@ -936,6 +940,10 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbo > +@@ -912,7 +916,8 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbo > + // escape to shared objects. isInIplt indicates a non-preemptible ifunc. > Its > + // address may escape if referenced by a direct relocation. The condition > is > + // conservative. > +- bool hasBti = btiHeader && (sym.hasFlag(NEEDS_COPY) || sym.isInIplt); > ++ bool hasBti = btiHeader && > ++ (sym.hasFlag(NEEDS_COPY) || sym.isInIplt || > sym.thunkAccessed); > + if (hasBti) { > + memcpy(buf, btiData, sizeof(btiData)); > + buf += sizeof(btiData); > +@@ -936,6 +941,10 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbo > } > > static TargetInfo *getTargetInfo() { > @@ -24,7 +34,7 @@ Index: lld/ELF/Arch/AArch64.cpp > if ((config->andFeatures & GNU_PROPERTY_AARCH64_FEATURE_1_BTI) || > config->zPacPlt) { > static AArch64BtiPac t; > -@@ -943,6 +951,7 @@ static TargetInfo *getTargetInfo() { > +@@ -943,6 +952,7 @@ static TargetInfo *getTargetInfo() { > } > static AArch64 t; > return &t; > Index: patches/patch-lld_ELF_Symbols_cpp > =================================================================== > RCS file: /cvs/ports/devel/llvm/16/patches/patch-lld_ELF_Symbols_cpp,v > diff -u -p -r1.1.1.1 patch-lld_ELF_Symbols_cpp > --- patches/patch-lld_ELF_Symbols_cpp 3 Sep 2023 16:00:03 -0000 1.1.1.1 > +++ patches/patch-lld_ELF_Symbols_cpp 26 Nov 2023 14:11:32 -0000 > @@ -1,6 +1,15 @@ > Index: lld/ELF/Symbols.cpp > --- lld/ELF/Symbols.cpp.orig > +++ lld/ELF/Symbols.cpp > +@@ -25,7 +25,7 @@ using namespace llvm::ELF; > + using namespace lld; > + using namespace lld::elf; > + > +-static_assert(sizeof(SymbolUnion) <= 64, "SymbolUnion too large"); > ++static_assert(sizeof(SymbolUnion) <= 72, "SymbolUnion too large"); > + > + template <typename T> struct AssertSymbol { > + static_assert(std::is_trivially_destructible<T>(), > @@ -61,6 +61,7 @@ std::string lld::toString(const elf::Symbol &sym) { > } > > Index: patches/patch-lld_ELF_Symbols_h > =================================================================== > RCS file: /cvs/ports/devel/llvm/16/patches/patch-lld_ELF_Symbols_h,v > diff -u -p -r1.1.1.1 patch-lld_ELF_Symbols_h > --- patches/patch-lld_ELF_Symbols_h 3 Sep 2023 16:00:03 -0000 1.1.1.1 > +++ patches/patch-lld_ELF_Symbols_h 26 Nov 2023 14:11:32 -0000 > @@ -20,7 +20,17 @@ Index: lld/ELF/Symbols.h > > void overwrite(Symbol &sym, Kind k) const { > if (sym.traced) > -@@ -490,6 +493,9 @@ struct ElfSym { > +@@ -292,6 +295,9 @@ class Symbol { (public) > + // True if defined in a DSO as protected visibility. > + uint8_t dsoProtected : 1; > + > ++ // True if targeted by a range extension thunk. > ++ uint8_t thunkAccessed : 1; > ++ > + // Temporary flags used to communicate which symbol entries need PLT and > GOT > + // entries during postScanRelocations(); > + std::atomic<uint16_t> flags; > +@@ -490,6 +496,9 @@ struct ElfSym { > // __bss_start > static Defined *bss; > > @@ -30,7 +40,7 @@ Index: lld/ELF/Symbols.h > // etext and _etext > static Defined *etext1; > static Defined *etext2; > -@@ -546,6 +552,8 @@ void reportDuplicate(const Symbol &sym, const InputFil > +@@ -546,6 +555,8 @@ void reportDuplicate(const Symbol &sym, const InputFil > InputSectionBase *errSec, uint64_t errOffset); > void maybeWarnUnorderableSymbol(const Symbol *sym); > bool computeIsPreemptible(const Symbol &sym); > Index: patches/patch-lld_ELF_Thunks_cpp > =================================================================== > RCS file: patches/patch-lld_ELF_Thunks_cpp > diff -N patches/patch-lld_ELF_Thunks_cpp > --- /dev/null 1 Jan 1970 00:00:00 -0000 > +++ patches/patch-lld_ELF_Thunks_cpp 26 Nov 2023 14:11:32 -0000 > @@ -0,0 +1,14 @@ > +Index: lld/ELF/Thunks.cpp > +--- lld/ELF/Thunks.cpp.orig > ++++ lld/ELF/Thunks.cpp > +@@ -1217,7 +1217,9 @@ bool PPC64LongBranchThunk::isCompatibleWith(const Inpu > + return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14; > + } > + > +-Thunk::Thunk(Symbol &d, int64_t a) : destination(d), addend(a), offset(0) {} > ++Thunk::Thunk(Symbol &d, int64_t a) : destination(d), addend(a), offset(0) { > ++ destination.thunkAccessed = true; > ++} > + > + Thunk::~Thunk() = default; > + > Index: patches/patch-lld_test_ELF_aarch64-feature-bti-plt_s > =================================================================== > RCS file: patches/patch-lld_test_ELF_aarch64-feature-bti-plt_s > diff -N patches/patch-lld_test_ELF_aarch64-feature-bti-plt_s > --- /dev/null 1 Jan 1970 00:00:00 -0000 > +++ patches/patch-lld_test_ELF_aarch64-feature-bti-plt_s 26 Nov 2023 > 14:11:32 -0000 > @@ -0,0 +1,58 @@ > +Index: lld/test/ELF/aarch64-feature-bti-plt.s > +--- lld/test/ELF/aarch64-feature-bti-plt.s.orig > ++++ lld/test/ELF/aarch64-feature-bti-plt.s > +@@ -0,0 +1,54 @@ > ++# REQUIRES: aarch64 > ++ > ++# RUN: rm -rf %t && split-file %s %t > ++ > ++# RUN: llvm-mc --triple=aarch64 --filetype=obj -o %t.o %t/a.s > ++# RUN: ld.lld --shared -T %t/largegap.lds -z force-bti %t.o -o %t.elf > ++# RUN: llvm-objdump -d %t.elf | FileCheck %s > ++ > ++#--- largegap.lds > ++SECTIONS { > ++ .plt : { *(.plt) } > ++ .text.near 0x1000 : AT(0x1000) { *(.text.near) } > ++ .text.far 0xf0000000 : AT(0xf0000000) { *(.text.far) } > ++} > ++ > ++#--- a.s > ++# CHECK: <.plt>: > ++# CHECK-NEXT: bti c > ++ > ++## foo@plt is targeted by a range extension thunk with an indirect branch. > ++## Add a bti c instruction. > ++# CHECK: <foo@plt>: > ++# CHECK-NEXT: bti c > ++ > ++## biz is not targeted by a thunk using an indirect branch, so no need for > bti c. > ++# CHECK: <biz@plt>: > ++# CHECK-NEXT: adrp x16, {{.*}} <func> > ++ > ++# CHECK: <bar>: > ++# CHECK-NEXT: bl {{.*}} <foo@plt> > ++# CHECK-NEXT: bl {{.*}} <biz@plt> > ++ > ++# CHECK: <func>: > ++# CHECK-NEXT: bl {{.*}} <__AArch64ADRPThunk_foo> > ++ > ++# CHECK: <__AArch64ADRPThunk_foo>: > ++# CHECK-NEXT: adrp x16, 0x0 <foo> > ++# CHECK-NEXT: add x16, x16, {{.*}} > ++# CHECK-NEXT: br x16 > ++ > ++ .global foo > ++ .global biz > ++ .section .text.near, "ax", %progbits > ++bar: > ++ .type bar, %function > ++ bl foo > ++ bl biz > ++ ret > ++ > ++ .section .text.far, "ax", %progbits > ++func: > ++ .type func, %function > ++ bl foo > ++ ret
-- Regards, Robert Nagy
