On Thu, Jun 29, 2023 at 10:54:10AM +0200, Theo Buehler wrote:
> On Thu, Jun 29, 2023 at 09:23:53AM +0100, Stuart Henderson wrote:
> > Does the same happen if you build your own kernel rather than using a
> > snap?
>
> Someone will have to port the patches that add _CET_ENDBR from
> security/boringssl/head to security/rust-ring.
Something like this should do the trick. Can't test it. Build and
install rust-ring with this patch, then build and install ncspot.
Index: Makefile
===================================================================
RCS file: /cvs/ports/security/rust-ring/Makefile,v
retrieving revision 1.10
diff -u -p -r1.10 Makefile
--- Makefile 12 Apr 2023 18:43:01 -0000 1.10
+++ Makefile 29 Jun 2023 09:22:34 -0000
@@ -4,7 +4,7 @@ COMMENT = ring crate source patched for
VERSION = 0.16.20
DISTNAME = ring-${VERSION}
PKGNAME = rust-${DISTNAME}
-REVISION = 6
+REVISION = 7
SUBST_VARS = VERSION
Index: patches/patch-pregenerated_aesni-gcm-x86_64-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_aesni-gcm-x86_64-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_aesni-gcm-x86_64-elf_S
--- patches/patch-pregenerated_aesni-gcm-x86_64-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_aesni-gcm-x86_64-elf_S 29 Jun 2023 09:17:43
-0000
@@ -1,7 +1,23 @@
Index: pregenerated/aesni-gcm-x86_64-elf.S
--- pregenerated/aesni-gcm-x86_64-elf.S.orig
+++ pregenerated/aesni-gcm-x86_64-elf.S
-@@ -827,6 +827,7 @@ GFp_aesni_gcm_encrypt:
+@@ -346,6 +346,7 @@ _aesni_ctr32_ghash_6x:
+ .align 32
+ GFp_aesni_gcm_decrypt:
+ .cfi_startproc
++ _CET_ENDBR
+ xorq %r10,%r10
+
+
+@@ -553,6 +554,7 @@ _aesni_ctr32_6x:
+ .align 32
+ GFp_aesni_gcm_encrypt:
+ .cfi_startproc
++ _CET_ENDBR
+ xorq %r10,%r10
+
+
+@@ -827,6 +829,7 @@ GFp_aesni_gcm_encrypt:
.byte 0xf3,0xc3
.cfi_endproc
.size GFp_aesni_gcm_encrypt,.-GFp_aesni_gcm_encrypt
@@ -9,7 +25,7 @@ Index: pregenerated/aesni-gcm-x86_64-elf
.align 64
.Lbswap_mask:
.byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
-@@ -839,6 +840,7 @@ GFp_aesni_gcm_encrypt:
+@@ -839,6 +842,7 @@ GFp_aesni_gcm_encrypt:
.Lone_lsb:
.byte 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byte
65,69,83,45,78,73,32,71,67,77,32,109,111,100,117,108,101,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
Index: patches/patch-pregenerated_aesni-x86_64-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_aesni-x86_64-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_aesni-x86_64-elf_S
--- patches/patch-pregenerated_aesni-x86_64-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_aesni-x86_64-elf_S 29 Jun 2023 09:17:43
-0000
@@ -1,7 +1,31 @@
Index: pregenerated/aesni-x86_64-elf.S
--- pregenerated/aesni-x86_64-elf.S.orig
+++ pregenerated/aesni-x86_64-elf.S
-@@ -1157,6 +1157,7 @@ __aesni_set_encrypt_key:
+@@ -17,6 +17,7 @@
+ .align 16
+ GFp_aes_hw_encrypt:
+ .cfi_startproc
++ _CET_ENDBR
+ movups (%rdi),%xmm2
+ movl 240(%rdx),%eax
+ movups (%rdx),%xmm0
+@@ -274,6 +275,7 @@ _aesni_encrypt8:
+ .align 16
+ GFp_aes_hw_ctr32_encrypt_blocks:
+ .cfi_startproc
++ _CET_ENDBR
+ cmpq $1,%rdx
+ jne .Lctr32_bulk
+
+@@ -856,6 +858,7 @@ GFp_aes_hw_ctr32_encrypt_blocks:
+ GFp_aes_hw_set_encrypt_key:
+ __aesni_set_encrypt_key:
+ .cfi_startproc
++ _CET_ENDBR
+ .byte 0x48,0x83,0xEC,0x08
+ .cfi_adjust_cfa_offset 8
+ movq $-1,%rax
+@@ -1157,6 +1160,7 @@ __aesni_set_encrypt_key:
.byte 0xf3,0xc3
.size GFp_aes_hw_set_encrypt_key,.-GFp_aes_hw_set_encrypt_key
.size __aesni_set_encrypt_key,.-__aesni_set_encrypt_key
@@ -9,7 +33,7 @@ Index: pregenerated/aesni-x86_64-elf.S
.align 64
.Lbswap_mask:
.byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
-@@ -1177,5 +1178,6 @@ __aesni_set_encrypt_key:
+@@ -1177,5 +1181,6 @@ __aesni_set_encrypt_key:
.byte
65,69,83,32,102,111,114,32,73,110,116,101,108,32,65,69,83,45,78,73,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.align 64
Index: patches/patch-pregenerated_chacha-x86_64-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_chacha-x86_64-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_chacha-x86_64-elf_S
--- patches/patch-pregenerated_chacha-x86_64-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_chacha-x86_64-elf_S 29 Jun 2023 09:17:43
-0000
@@ -9,7 +9,7 @@ Index: pregenerated/chacha-x86_64-elf.S
.align 64
.Lzero:
.long 0,0,0,0
-@@ -42,6 +43,7 @@
+@@ -42,12 +43,14 @@
.Lsixteen:
.long 16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16
.byte
67,104,97,67,104,97,50,48,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
@@ -17,3 +17,10 @@ Index: pregenerated/chacha-x86_64-elf.S
.globl GFp_ChaCha20_ctr32
.hidden GFp_ChaCha20_ctr32
.type GFp_ChaCha20_ctr32,@function
+ .align 64
+ GFp_ChaCha20_ctr32:
+ .cfi_startproc
++ _CET_ENDBR
+ cmpq $0,%rdx
+ je .Lno_data
+ movq GFp_ia32cap_P+4(%rip),%r10
Index: patches/patch-pregenerated_chacha20_poly1305_x86_64-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_chacha20_poly1305_x86_64-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_chacha20_poly1305_x86_64-elf_S
--- patches/patch-pregenerated_chacha20_poly1305_x86_64-elf_S 24 Feb 2023
08:09:50 -0000 1.2
+++ patches/patch-pregenerated_chacha20_poly1305_x86_64-elf_S 29 Jun 2023
09:17:43 -0000
@@ -17,3 +17,19 @@ Index: pregenerated/chacha20_poly1305_x8
.type poly_hash_ad_internal,@function
.align 64
+@@ -225,6 +227,7 @@ poly_hash_ad_internal:
+ .align 64
+ GFp_chacha20_poly1305_open:
+ .cfi_startproc
++ _CET_ENDBR
+ pushq %rbp
+ .cfi_adjust_cfa_offset 8
+ .cfi_offset %rbp,-16
+@@ -2109,6 +2112,7 @@ GFp_chacha20_poly1305_open:
+ .align 64
+ GFp_chacha20_poly1305_seal:
+ .cfi_startproc
++ _CET_ENDBR
+ pushq %rbp
+ .cfi_adjust_cfa_offset 8
+ .cfi_offset %rbp,-16
Index: patches/patch-pregenerated_ghash-x86_64-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_ghash-x86_64-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_ghash-x86_64-elf_S
--- patches/patch-pregenerated_ghash-x86_64-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_ghash-x86_64-elf_S 29 Jun 2023 09:17:43
-0000
@@ -1,7 +1,47 @@
Index: pregenerated/ghash-x86_64-elf.S
--- pregenerated/ghash-x86_64-elf.S.orig
+++ pregenerated/ghash-x86_64-elf.S
-@@ -1100,6 +1100,7 @@ GFp_gcm_ghash_avx:
+@@ -17,6 +17,7 @@
+ .align 16
+ GFp_gcm_init_clmul:
+ .cfi_startproc
++ _CET_ENDBR
+ .L_init_clmul:
+ movdqu (%rsi),%xmm2
+ pshufd $78,%xmm2,%xmm2
+@@ -176,6 +177,7 @@ GFp_gcm_init_clmul:
+ .align 16
+ GFp_gcm_gmult_clmul:
+ .cfi_startproc
++ _CET_ENDBR
+ .L_gmult_clmul:
+ movdqu (%rdi),%xmm0
+ movdqa .Lbswap_mask(%rip),%xmm5
+@@ -230,6 +232,7 @@ GFp_gcm_gmult_clmul:
+ .align 32
+ GFp_gcm_ghash_clmul:
+ .cfi_startproc
++ _CET_ENDBR
+ .L_ghash_clmul:
+ movdqa .Lbswap_mask(%rip),%xmm10
+
+@@ -617,6 +620,7 @@ GFp_gcm_ghash_clmul:
+ .align 32
+ GFp_gcm_init_avx:
+ .cfi_startproc
++ _CET_ENDBR
+ vzeroupper
+
+ vmovdqu (%rsi),%xmm2
+@@ -727,6 +731,7 @@ GFp_gcm_init_avx:
+ .align 32
+ GFp_gcm_ghash_avx:
+ .cfi_startproc
++ _CET_ENDBR
+ vzeroupper
+
+ vmovdqu (%rdi),%xmm10
+@@ -1100,6 +1105,7 @@ GFp_gcm_ghash_avx:
.byte 0xf3,0xc3
.cfi_endproc
.size GFp_gcm_ghash_avx,.-GFp_gcm_ghash_avx
@@ -9,7 +49,7 @@ Index: pregenerated/ghash-x86_64-elf.S
.align 64
.Lbswap_mask:
.byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
-@@ -1111,5 +1112,6 @@ GFp_gcm_ghash_avx:
+@@ -1111,5 +1117,6 @@ GFp_gcm_ghash_avx:
.byte
71,72,65,83,72,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.align 64
Index: patches/patch-pregenerated_p256-x86_64-asm-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_p256-x86_64-asm-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_p256-x86_64-asm-elf_S
--- patches/patch-pregenerated_p256-x86_64-asm-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_p256-x86_64-asm-elf_S 29 Jun 2023 09:17:43
-0000
@@ -10,12 +10,102 @@ Index: pregenerated/p256-x86_64-asm-elf.
.align 64
.Lpoly:
.quad 0xffffffffffffffff, 0x00000000ffffffff, 0x0000000000000000,
0xffffffff00000001
-@@ -31,7 +31,7 @@
+@@ -31,9 +31,9 @@
.quad 0xf3b9cac2fc632551, 0xbce6faada7179e84, 0xffffffffffffffff,
0xffffffff00000000
.LordK:
.quad 0xccd1c8aaee00bc4f
--
+.text
+-
.globl GFp_nistz256_add
+ .hidden GFp_nistz256_add
+ .type GFp_nistz256_add,@function
+@@ -87,6 +87,7 @@ GFp_nistz256_add:
+ .align 32
+ GFp_nistz256_neg:
+ .cfi_startproc
++ _CET_ENDBR
+ pushq %r12
+ .cfi_adjust_cfa_offset 8
+ .cfi_offset %r12,-16
+@@ -149,6 +150,7 @@ GFp_nistz256_neg:
+ .align 32
+ GFp_p256_scalar_mul_mont:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rcx
+ movq 8(%rcx),%rcx
+ andl $0x80100,%ecx
+@@ -483,6 +485,7 @@ GFp_p256_scalar_mul_mont:
+ .align 32
+ GFp_p256_scalar_sqr_rep_mont:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rcx
+ movq 8(%rcx),%rcx
+ andl $0x80100,%ecx
+@@ -1242,6 +1245,7 @@ ecp_nistz256_ord_sqr_montx:
+ .align 32
+ GFp_nistz256_mul_mont:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rcx
+ movq 8(%rcx),%rcx
+ andl $0x80100,%ecx
+@@ -1539,6 +1543,7 @@ __ecp_nistz256_mul_montq:
+ .align 32
+ GFp_nistz256_sqr_mont:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rcx
+ movq 8(%rcx),%rcx
+ andl $0x80100,%ecx
+@@ -2069,6 +2074,7 @@ __ecp_nistz256_sqr_montx:
+ .align 32
+ GFp_nistz256_select_w5:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rax
+ movq 8(%rax),%rax
+ testl $32,%eax
+@@ -2136,6 +2142,7 @@ GFp_nistz256_select_w5:
+ .align 32
+ GFp_nistz256_select_w7:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rax
+ movq 8(%rax),%rax
+ testl $32,%eax
+@@ -2255,6 +2262,7 @@ GFp_nistz256_avx2_select_w5:
+ .align 32
+ GFp_nistz256_avx2_select_w7:
+ .cfi_startproc
++ _CET_ENDBR
+ .Lavx2_select_w7:
+ vzeroupper
+ vmovdqa .LThree(%rip),%ymm0
+@@ -2462,6 +2470,7 @@ __ecp_nistz256_mul_by_2q:
+ .align 32
+ GFp_nistz256_point_double:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rcx
+ movq 8(%rcx),%rcx
+ andl $0x80100,%ecx
+@@ -2696,6 +2705,7 @@ GFp_nistz256_point_double:
+ .align 32
+ GFp_nistz256_point_add:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rcx
+ movq 8(%rcx),%rcx
+ andl $0x80100,%ecx
+@@ -3133,6 +3143,7 @@ GFp_nistz256_point_add:
+ .align 32
+ GFp_nistz256_point_add_affine:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%rcx
+ movq 8(%rcx),%rcx
+ andl $0x80100,%ecx
Index: patches/patch-pregenerated_sha256-x86_64-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_sha256-x86_64-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_sha256-x86_64-elf_S
--- patches/patch-pregenerated_sha256-x86_64-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_sha256-x86_64-elf_S 29 Jun 2023 09:17:43
-0000
@@ -1,7 +1,15 @@
Index: pregenerated/sha256-x86_64-elf.S
--- pregenerated/sha256-x86_64-elf.S.orig
+++ pregenerated/sha256-x86_64-elf.S
-@@ -1735,6 +1735,7 @@ GFp_sha256_block_data_order:
+@@ -18,6 +18,7 @@
+ .align 16
+ GFp_sha256_block_data_order:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%r11
+ movl 0(%r11),%r9d
+ movl 4(%r11),%r10d
+@@ -1735,6 +1736,7 @@ GFp_sha256_block_data_order:
.byte 0xf3,0xc3
.cfi_endproc
.size GFp_sha256_block_data_order,.-GFp_sha256_block_data_order
@@ -9,7 +17,7 @@ Index: pregenerated/sha256-x86_64-elf.S
.align 64
.type K256,@object
K256:
-@@ -1778,6 +1779,7 @@ K256:
+@@ -1778,6 +1780,7 @@ K256:
.long 0xffffffff,0xffffffff,0x03020100,0x0b0a0908
.long 0xffffffff,0xffffffff,0x03020100,0x0b0a0908
.byte
83,72,65,50,53,54,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
Index: patches/patch-pregenerated_sha512-x86_64-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_sha512-x86_64-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_sha512-x86_64-elf_S
--- patches/patch-pregenerated_sha512-x86_64-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_sha512-x86_64-elf_S 29 Jun 2023 09:17:43
-0000
@@ -1,7 +1,15 @@
Index: pregenerated/sha512-x86_64-elf.S
--- pregenerated/sha512-x86_64-elf.S.orig
+++ pregenerated/sha512-x86_64-elf.S
-@@ -1733,6 +1733,7 @@ GFp_sha512_block_data_order:
+@@ -18,6 +18,7 @@
+ .align 16
+ GFp_sha512_block_data_order:
+ .cfi_startproc
++ _CET_ENDBR
+ leaq GFp_ia32cap_P(%rip),%r11
+ movl 0(%r11),%r9d
+ movl 4(%r11),%r10d
+@@ -1733,6 +1734,7 @@ GFp_sha512_block_data_order:
.byte 0xf3,0xc3
.cfi_endproc
.size GFp_sha512_block_data_order,.-GFp_sha512_block_data_order
@@ -9,7 +17,7 @@ Index: pregenerated/sha512-x86_64-elf.S
.align 64
.type K512,@object
K512:
-@@ -1820,6 +1821,7 @@ K512:
+@@ -1820,6 +1822,7 @@ K512:
.quad 0x0001020304050607,0x08090a0b0c0d0e0f
.quad 0x0001020304050607,0x08090a0b0c0d0e0f
.byte
83,72,65,53,49,50,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
Index: patches/patch-pregenerated_vpaes-x86_64-elf_S
===================================================================
RCS file: patches/patch-pregenerated_vpaes-x86_64-elf_S
diff -N patches/patch-pregenerated_vpaes-x86_64-elf_S
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-pregenerated_vpaes-x86_64-elf_S 29 Jun 2023 09:17:43
-0000
@@ -0,0 +1,27 @@
+Index: pregenerated/vpaes-x86_64-elf.S
+--- pregenerated/vpaes-x86_64-elf.S.orig
++++ pregenerated/vpaes-x86_64-elf.S
+@@ -579,6 +579,7 @@ _vpaes_schedule_mangle:
+ .align 16
+ GFp_vpaes_set_encrypt_key:
+ .cfi_startproc
++ _CET_ENDBR
+ #ifdef BORINGSSL_DISPATCH_TEST
+ .extern BORINGSSL_function_hit
+ .hidden BORINGSSL_function_hit
+@@ -604,6 +605,7 @@ GFp_vpaes_set_encrypt_key:
+ .align 16
+ GFp_vpaes_encrypt:
+ .cfi_startproc
++ _CET_ENDBR
+ movdqu (%rdi),%xmm0
+ call _vpaes_preheat
+ call _vpaes_encrypt_core
+@@ -617,6 +619,7 @@ GFp_vpaes_encrypt:
+ .align 16
+ GFp_vpaes_ctr32_encrypt_blocks:
+ .cfi_startproc
++ _CET_ENDBR
+
+ xchgq %rcx,%rdx
+ testq %rcx,%rcx
Index: patches/patch-pregenerated_x86_64-mont-elf_S
===================================================================
RCS file: patches/patch-pregenerated_x86_64-mont-elf_S
diff -N patches/patch-pregenerated_x86_64-mont-elf_S
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-pregenerated_x86_64-mont-elf_S 29 Jun 2023 09:17:43
-0000
@@ -0,0 +1,11 @@
+Index: pregenerated/x86_64-mont-elf.S
+--- pregenerated/x86_64-mont-elf.S.orig
++++ pregenerated/x86_64-mont-elf.S
+@@ -19,6 +19,7 @@
+ .align 16
+ GFp_bn_mul_mont:
+ .cfi_startproc
++ _CET_ENDBR
+ movl %r9d,%r9d
+ movq %rsp,%rax
+ .cfi_def_cfa_register %rax
Index: patches/patch-pregenerated_x86_64-mont5-elf_S
===================================================================
RCS file:
/cvs/ports/security/rust-ring/patches/patch-pregenerated_x86_64-mont5-elf_S,v
retrieving revision 1.2
diff -u -p -r1.2 patch-pregenerated_x86_64-mont5-elf_S
--- patches/patch-pregenerated_x86_64-mont5-elf_S 24 Feb 2023 08:09:50
-0000 1.2
+++ patches/patch-pregenerated_x86_64-mont5-elf_S 29 Jun 2023 09:17:43
-0000
@@ -1,7 +1,63 @@
Index: pregenerated/x86_64-mont5-elf.S
--- pregenerated/x86_64-mont5-elf.S.orig
+++ pregenerated/x86_64-mont5-elf.S
-@@ -3777,10 +3777,12 @@ GFp_bn_gather5:
+@@ -19,6 +19,7 @@
+ .align 64
+ GFp_bn_mul_mont_gather5:
+ .cfi_startproc
++ _CET_ENDBR
+ movl %r9d,%r9d
+ movq %rsp,%rax
+ .cfi_def_cfa_register %rax
+@@ -1093,6 +1094,7 @@ mul4x_internal:
+ .align 32
+ GFp_bn_power5:
+ .cfi_startproc
++ _CET_ENDBR
+ movq %rsp,%rax
+ .cfi_def_cfa_register %rax
+ leaq GFp_ia32cap_P(%rip),%r11
+@@ -1232,6 +1234,7 @@ GFp_bn_power5:
+ GFp_bn_sqr8x_internal:
+ __bn_sqr8x_internal:
+ .cfi_startproc
++ _CET_ENDBR
+
+
+
+@@ -2070,6 +2073,7 @@ __bn_post4x_internal:
+ .align 32
+ GFp_bn_from_montgomery:
+ .cfi_startproc
++ _CET_ENDBR
+ testl $7,%r9d
+ jz bn_from_mont8x
+ xorl %eax,%eax
+@@ -2922,6 +2926,7 @@ bn_powerx5:
+ GFp_bn_sqrx8x_internal:
+ __bn_sqrx8x_internal:
+ .cfi_startproc
++ _CET_ENDBR
+
+
+
+@@ -3594,6 +3599,7 @@ __bn_postx4x_internal:
+ .align 16
+ GFp_bn_scatter5:
+ .cfi_startproc
++ _CET_ENDBR
+ cmpl $0,%esi
+ jz .Lscatter_epilogue
+ leaq (%rdx,%rcx,8),%rdx
+@@ -3615,6 +3621,7 @@ GFp_bn_scatter5:
+ .align 32
+ GFp_bn_gather5:
+ .cfi_startproc
++ _CET_ENDBR
+ .LSEH_begin_GFp_bn_gather5:
+
+ .byte 0x4c,0x8d,0x14,0x24
+@@ -3777,10 +3784,12 @@ GFp_bn_gather5:
.LSEH_end_GFp_bn_gather5:
.cfi_endproc
.size GFp_bn_gather5,.-GFp_bn_gather5
