On Tue, Dec 21, 2021 at 08:54:05PM +0100, Jan Stary wrote: > On Dec 20 09:44:38, mlar...@nested.page wrote: > > On Mon, Dec 20, 2021 at 11:55:38AM +0100, Jan Stary wrote: > > > Dear all, > > > > > > I know the question keeps repeating here, > > > but is there a web browser that is at least usable? > > > > > > I switched from Firefox to Chrome about a year ago, > > > but it has become unbearably slow and hungry. > > > > > > On a machine with Intel(R) Core(TM)2 Duo CPU P8400 @ 2.26GHz, > > > and 8GB of ram, about ten tabs make it ridiculously unresponsive. > > > > > > > That's a CPU released in 2008. Thirteen years ago. While I agree that > > browsers > > have become more bloated, I think the "ridiculously unreponsive" claim here > > is probably due to something else in this case. > > Is that considered slow by now? I honestly don't know. > Beside chrome, everything runs smooth as an oiled cucumber; > kernel recompiles in a few minutes, no problem except the browser. > (Truth be told, I also happen to like these older Thinkpads.)
I regularly use surf, a webkit-based browser, on a Thinkpad X201 without much difficulty: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz, 2793.49 MHz, 06-25-02 Performance is slightly slower but still usable on a RockPI-4b: cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4 cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache cpu0: 512KB 64b/line 16-way L2 cache cpu1 at mainbus0 mpidr 1: ARM Cortex-A53 r0p4 cpu1: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache cpu1: 512KB 64b/line 16-way L2 cache cpu2 at mainbus0 mpidr 2: ARM Cortex-A53 r0p4 cpu2: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache cpu2: 512KB 64b/line 16-way L2 cache cpu3 at mainbus0 mpidr 3: ARM Cortex-A53 r0p4 cpu3: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache cpu3: 512KB 64b/line 16-way L2 cache cpu4 at mainbus0 mpidr 100: ARM Cortex-A72 r0p2 cpu4: 48KB 64b/line 3-way L1 PIPT I-cache, 32KB 64b/line 2-way L1 D-cache cpu4: 1024KB 64b/line 16-way L2 cache cpu5 at mainbus0 mpidr 101: ARM Cortex-A72 r0p2 cpu5: 48KB 64b/line 3-way L1 PIPT I-cache, 32KB 64b/line 2-way L1 D-cache cpu5: 1024KB 64b/line 16-way L2 cache
