On Sat, Dec 30, 2006 at 05:56:38PM -0500, Ian Darwin wrote:
>
> >Verilog is the name of the hardware description language.
> >It used to be a proprietary language, and later was put in the public
> >domain (similar to what's happening to Java right now).
> >However, it is still governed by one organization
> >http://www.accellera.org/ and the name is probably protected.
> >Accellera also governs VHDL and both have international standards
> >managed by IEEE standardization groups.
>
> Please, use some precision in language here. If a language specification
> is controlled by one organization (and enforced by force of law as in
> trademark), it is NOT "public domain".
>
> Java certainly isn't P.D.; it is controlled by Sun, who have only
> GPL'd (not put into the public domain) their particular implementations
> of Java.
I said _similar_, _not_ the _same_, in comparison to Java.
I _believed_ that was _precise_ enough.
Java is irrelevant in my question about the package name.
In the case of Verilog, it used to be a property of Gateway Design
Automation. When Cadence bought GDA, they realized that the industry is
moving to VHDL which had an open international standard and was pushed
forward by DoD.
So, they put Verilog HDL, the _language_, in _public domain_.
I repeat, _public domain_.
The Verilog _simulator_ by Cadence is proprietary.
To prevent any single company to have a control over the extensions to
the language an IEEE standardization group was formed to lead the
development of the language. The language became a great success.
Several years ago, the consortium has been formed to lead the
standardization of both VHDL and Verilog -- Accellera.
>
> Public Domain means you can do whatever you like with it; it doesn't
> sound like Verilog is P.D. either.
>
Can you reuse the name for another product?
I don't know.
That's the only reason I _asked_ about the _opinion_ on package name.
Verilog HDL is _public domain_.
Verilog compiler/simulator/synthesizer is not.
Why are all the packages on my book CD named iverilog?
Why is this compiler/simulator/synthesizer named Icarus Verilog?
Perhaps to be distinguished from the original Cadence Verilog?
Anyway, you can do with Verilog HDL whatever you want but if IEEE and
Accellera do not approve it, it does not go in the new standard.
I believe I don't need to explain the importance of standards to keep
the hardware interoperable. Do notice, that IEEE is an open
international organization. For example, IEEE floating-point arithmetic
standard used in all modern processors or Ethernet standard for LANs are
not less open and non-public-domain because they are governed by IEEE
standardization groups and any change must go through them.
Any Verilog compiler/simulator must support the standard to have any
chance in the industry.
Finally, you may be an expert on Java (which is probably why you reacted
the way you did), but please grant me the benefit of doubt that I just
might be an expert on hardware description languages.
Which does not make me an expert on law or licenses, of course.
However, I know for a fact that Verilog _was_ put in _public domain_.
It's only a mutual agreement about the importance of standardization
that keeps it under IEEE/Accellera _guidance_.
When thinking about the package name we also have to think about what
happens tomorrow if we have another Verilog compiler/simulator package
(say, Daedalus Verilog)? Which one should have a distinction of
carrying only the language name in the package name?
I hope this was a _little_ more precise.
Best regards,
Zvezdan
