From bf13997ab601d8a91bc80e0e8cd11159f9c1eb25 Mon Sep 17 00:00:00 2001 From: John Naylor Date: Tue, 25 Feb 2025 13:59:21 +0700 Subject: [PATCH v9 2/5] Rename CRC *choose files to cpucap* files On Meson, build them unconditionally on the relevant arch. FIXME autoconf builds are broken Signed-off-by: Raghuveer Devulapalli --- configure | 4 ++-- configure.ac | 4 ++-- src/include/port/pg_cpucap.h | 3 +++ src/include/port/pg_crc32c.h | 2 -- src/port/Makefile | 2 ++ src/port/meson.build | 17 +++++++++++----- src/port/pg_cpucap.c | 18 ----------------- ..._crc32c_armv8_choose.c => pg_cpucap_arm.c} | 16 ++++++++++++--- ..._crc32c_sse42_choose.c => pg_cpucap_x86.c} | 20 ++++++++++++++----- 9 files changed, 49 insertions(+), 37 deletions(-) rename src/port/{pg_crc32c_armv8_choose.c => pg_cpucap_arm.c} (92%) rename src/port/{pg_crc32c_sse42_choose.c => pg_cpucap_x86.c} (73%) diff --git a/configure b/configure index 0ffcaeb436..0d31e6a236 100755 --- a/configure +++ b/configure @@ -17360,7 +17360,7 @@ else $as_echo "#define USE_SSE42_CRC32C_WITH_RUNTIME_CHECK 1" >>confdefs.h - PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o pg_crc32c_sse42_choose.o" + PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o { $as_echo "$as_me:${as_lineno-$LINENO}: result: SSE 4.2 with runtime check" >&5 $as_echo "SSE 4.2 with runtime check" >&6; } else @@ -17376,7 +17376,7 @@ $as_echo "ARMv8 CRC instructions" >&6; } $as_echo "#define USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK 1" >>confdefs.h - PG_CRC32C_OBJS="pg_crc32c_armv8.o pg_crc32c_sb8.o pg_crc32c_armv8_choose.o" + PG_CRC32C_OBJS="pg_crc32c_armv8.o pg_crc32c_sb8.o { $as_echo "$as_me:${as_lineno-$LINENO}: result: ARMv8 CRC instructions with runtime check" >&5 $as_echo "ARMv8 CRC instructions with runtime check" >&6; } else diff --git a/configure.ac b/configure.ac index f56681e0d9..60d30f855d 100644 --- a/configure.ac +++ b/configure.ac @@ -2115,7 +2115,7 @@ if test x"$USE_SSE42_CRC32C" = x"1"; then else if test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"1"; then AC_DEFINE(USE_SSE42_CRC32C_WITH_RUNTIME_CHECK, 1, [Define to 1 to use Intel SSE 4.2 CRC instructions with a runtime check.]) - PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o pg_crc32c_sse42_choose.o" + PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o AC_MSG_RESULT(SSE 4.2 with runtime check) else if test x"$USE_ARMV8_CRC32C" = x"1"; then @@ -2125,7 +2125,7 @@ else else if test x"$USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK" = x"1"; then AC_DEFINE(USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK, 1, [Define to 1 to use ARMv8 CRC Extension with a runtime check.]) - PG_CRC32C_OBJS="pg_crc32c_armv8.o pg_crc32c_sb8.o pg_crc32c_armv8_choose.o" + PG_CRC32C_OBJS="pg_crc32c_armv8.o pg_crc32c_sb8.o AC_MSG_RESULT(ARMv8 CRC instructions with runtime check) else if test x"$USE_LOONGARCH_CRC32C" = x"1"; then diff --git a/src/include/port/pg_cpucap.h b/src/include/port/pg_cpucap.h index 81edfedce5..5e04213b21 100644 --- a/src/include/port/pg_cpucap.h +++ b/src/include/port/pg_cpucap.h @@ -22,4 +22,7 @@ extern PGDLLIMPORT uint32 pg_cpucap; extern void pg_cpucap_initialize(void); +/* arch-specific functions private to src/port */ +extern void pg_cpucap_crc32c(void); + #endif /* PG_CPUCAP_H */ diff --git a/src/include/port/pg_crc32c.h b/src/include/port/pg_crc32c.h index b565a0f294..4f0ebb9923 100644 --- a/src/include/port/pg_crc32c.h +++ b/src/include/port/pg_crc32c.h @@ -57,7 +57,6 @@ typedef uint32 pg_crc32c; extern pg_crc32c pg_comp_crc32c_sb8(pg_crc32c crc, const void *data, size_t len); #endif -extern bool pg_crc32c_sse42_available(void); extern pg_crc32c pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t len); #elif defined(USE_ARMV8_CRC32C) || defined(USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK) @@ -76,7 +75,6 @@ extern pg_crc32c pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t le extern pg_crc32c pg_comp_crc32c_sb8(pg_crc32c crc, const void *data, size_t len); #endif -extern bool pg_crc32c_armv8_available(void); extern pg_crc32c pg_comp_crc32c_armv8(pg_crc32c crc, const void *data, size_t len); #elif defined(USE_LOONGARCH_CRC32C) diff --git a/src/port/Makefile b/src/port/Makefile index 5a05179e92..1fc03713b3 100644 --- a/src/port/Makefile +++ b/src/port/Makefile @@ -45,6 +45,8 @@ OBJS = \ path.o \ pg_bitutils.o \ pg_cpucap.o \ + pg_cpucap_x86.o \ + pg_cpucap_arm.o \ pg_popcount_avx512.o \ pg_strong_random.o \ pgcheckdir.o \ diff --git a/src/port/meson.build b/src/port/meson.build index e1e7ce8fb8..baa8e16200 100644 --- a/src/port/meson.build +++ b/src/port/meson.build @@ -78,22 +78,29 @@ if host_system != 'windows' replace_funcs_neg += [['pthread_barrier_wait']] endif +# arch-specific runtime checks +if host_cpu == 'x86' or host_cpu == 'x86_64' + pgport_sources += files( + 'pg_cpucap_x86.c' + ) + +elif host_cpu == 'arm' or host_cpu == 'aarch64' + pgport_sources += files( + 'pg_cpucap_arm.c' + ) +endif + # Replacement functionality to be built if corresponding configure symbol # is true replace_funcs_pos = [ # x86/x64 ['pg_crc32c_sse42', 'USE_SSE42_CRC32C'], ['pg_crc32c_sse42', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'], - # WIP sometime we'll need to build these based on host_cpu - ['pg_crc32c_sse42_choose', 'USE_SSE42_CRC32C'], - ['pg_crc32c_sse42_choose', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'], ['pg_crc32c_sb8', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'], # arm / aarch64 ['pg_crc32c_armv8', 'USE_ARMV8_CRC32C'], ['pg_crc32c_armv8', 'USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK', 'crc'], - ['pg_crc32c_armv8_choose', 'USE_ARMV8_CRC32C'], - ['pg_crc32c_armv8_choose', 'USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK'], ['pg_crc32c_sb8', 'USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK'], # loongarch diff --git a/src/port/pg_cpucap.c b/src/port/pg_cpucap.c index eba6e31c63..88d7582702 100644 --- a/src/port/pg_cpucap.c +++ b/src/port/pg_cpucap.c @@ -14,29 +14,11 @@ #include "c.h" #include "port/pg_cpucap.h" -#include "port/pg_crc32c.h" /* starts uninitialized so we can detect errors of omission */ uint32 pg_cpucap = 0; -/* - * Check if hardware instructions for CRC computation are available. - */ -static void -pg_cpucap_crc32c(void) -{ - /* WIP: It seems like we should use CPU arch symbols instead */ -#if defined(USE_SSE42_CRC32C) || defined(USE_SSE42_CRC32C_WITH_RUNTIME_CHECK) - if (pg_crc32c_sse42_available()) - pg_cpucap |= PGCPUCAP_CRC32C; - -#elif defined(USE_ARMV8_CRC32C) || defined(USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK) - if (pg_crc32c_armv8_available()) - pg_cpucap |= PGCPUCAP_CRC32C; -#endif -} - /* * This needs to be called in main() for every * program that calls a function that dispatches diff --git a/src/port/pg_crc32c_armv8_choose.c b/src/port/pg_cpucap_arm.c similarity index 92% rename from src/port/pg_crc32c_armv8_choose.c rename to src/port/pg_cpucap_arm.c index e3654427c3..19e052fecf 100644 --- a/src/port/pg_crc32c_armv8_choose.c +++ b/src/port/pg_cpucap_arm.c @@ -1,6 +1,6 @@ /*------------------------------------------------------------------------- * - * pg_crc32c_armv8_choose.c + * pg_cpucap_arm.c * Check if the CPU we're running on supports the ARMv8 CRC Extension. * * Portions Copyright (c) 1996-2025, PostgreSQL Global Development Group @@ -8,7 +8,7 @@ * * * IDENTIFICATION - * src/port/pg_crc32c_armv8_choose.c + * src/port/pg_cpucap_arm.c * *------------------------------------------------------------------------- */ @@ -35,7 +35,7 @@ #include "port/pg_crc32c.h" -bool +static bool pg_crc32c_armv8_available(void) { #if defined(HAVE_ELF_AUX_INFO) @@ -101,3 +101,13 @@ pg_crc32c_armv8_available(void) return false; #endif } + +/* + * Check if hardware instructions for CRC computation are available. + */ +void +pg_cpucap_crc32c(void) +{ + if (pg_crc32c_armv8_available()) + pg_cpucap |= PGCPUCAP_CRC32C; +} diff --git a/src/port/pg_crc32c_sse42_choose.c b/src/port/pg_cpucap_x86.c similarity index 73% rename from src/port/pg_crc32c_sse42_choose.c rename to src/port/pg_cpucap_x86.c index f4d3215bc5..07462bd1d2 100644 --- a/src/port/pg_crc32c_sse42_choose.c +++ b/src/port/pg_cpucap_x86.c @@ -1,6 +1,6 @@ /*------------------------------------------------------------------------- * - * pg_crc32c_sse42_choose.c + * pg_cpucap_x86.c * Check if the CPU we're running on supports SSE4.2. * * Portions Copyright (c) 1996-2025, PostgreSQL Global Development Group @@ -8,7 +8,7 @@ * * * IDENTIFICATION - * src/port/pg_crc32c_sse42_choose.c + * src/port/pg_cpucap_x86.c * *------------------------------------------------------------------------- */ @@ -23,10 +23,10 @@ #include #endif -#include "port/pg_crc32c.h" +#include "port/pg_cpucap.h" -bool -pg_crc32c_sse42_available(void) +static bool +pg_sse42_available(void) { unsigned int exx[4] = {0, 0, 0, 0}; @@ -40,3 +40,13 @@ pg_crc32c_sse42_available(void) return (exx[2] & (1 << 20)) != 0; /* SSE 4.2 */ } + +/* + * Check if hardware instructions for CRC computation are available. + */ +void +pg_cpucap_crc32c(void) +{ + if (pg_sse42_available()) + pg_cpucap |= PGCPUCAP_CRC32C; +} -- 2.43.0