This is an automated email from Gerrit. "Antonio Borneo <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9556
-- gerrit commit 4283f58cf0472e51a36c28ac33d25bd7734c9d6c Author: Antonio Borneo <[email protected]> Date: Wed Apr 1 15:21:00 2026 +0200 cortex_a: drop incorrect check for AARCH64 Commit a3b9e12aecc3 ("aarch64: introduce dpm extension for ARMv8") has moved all the ARMv8-A code in dedicated files, but has left a check for AARCH64 state in the cortex_a code. The state AARCH64 is not possible for ARMv7-A and should not be referenced in the file cortex_a.c Gcc compiler checks that all the possible values of the enum core_state are used in the switch/case and drops an error for missing check for AARCH64. Use the default case to cover all the unsupported cases. Change-Id: I2925f3898b618768e215a163ec0a4e5046f6ad15 Signed-off-by: Antonio Borneo <[email protected]> diff --git a/src/target/arm.h b/src/target/arm.h index 6d6412219e..b88860f4db 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -327,6 +327,7 @@ int arm_blank_check_memory(struct target *target, uint8_t erased_value, unsigned int *checked); void arm_set_cpsr(struct arm *arm, uint32_t cpsr); +const char *arm_core_state_string(struct arm *arm); struct reg *arm_reg_current(struct arm *arm, unsigned int regnum); struct reg *armv8_reg_current(struct arm *arm, unsigned int regnum); diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index 63c41c5835..1a68a3f326 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -1038,7 +1038,7 @@ void arm_dpm_report_wfar(struct arm_dpm *dpm, uint32_t addr) addr -= 4; break; case ARM_STATE_JAZELLE: - case ARM_STATE_AARCH64: + default: /* ?? */ break; } diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 4f61c58e2d..cd1f31080a 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -435,7 +435,7 @@ const int armv4_5_core_reg_map[9][17] = { } }; -static const char *arm_core_state_string(struct arm *arm) +const char *arm_core_state_string(struct arm *arm) { if (arm->core_state > ARRAY_SIZE(arm_state_strings)) { LOG_TARGET_ERROR(arm->target, "core_state exceeds table size"); diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 2efbcce0c9..0874edc8b0 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -872,10 +872,9 @@ static int cortex_a_internal_restore(struct target *target, bool current, resume_pc |= 0x1; break; case ARM_STATE_JAZELLE: - LOG_TARGET_ERROR(target, "How do I resume into Jazelle state??"); - return ERROR_FAIL; - case ARM_STATE_AARCH64: - LOG_TARGET_ERROR(target, "Shouldn't be in AARCH64 state"); + default: + LOG_TARGET_ERROR(target, "Unsupported core state \"%s\"", + arm_core_state_string(arm)); return ERROR_FAIL; } LOG_TARGET_DEBUG(target, "resume pc = 0x%08" PRIx32, resume_pc); --
