This is an automated email from Gerrit. "Mateusz Karcz <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9515
-- gerrit commit b3ee4ccdc9930f9958e4f934d5732b432e2d8719 Author: Mateusz Karcz <[email protected]> Date: Fri Mar 13 11:45:28 2026 +0100 flash/stm32l4x: Support STM32U3Cx devices STM32U3Cx devices have 2 MiB flash (split into pages of 4 KiB). Change-Id: I1628a36203bb128190af3309ef8ea7b00ff6fb3f Signed-off-by: Mateusz Karcz <[email protected]> diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 70b5261119..4fb2d2688f 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -293,6 +293,10 @@ static const struct stm32l4_rev stm32l47_l48xx_revs[] = { { 0x1000, "1" }, { 0x1001, "2" }, { 0x1003, "3" }, { 0x1007, "4" } }; +static const struct stm32l4_rev stm32u3cxx_revs[] = { + { 0x1000, "A" }, +}; + static const struct stm32l4_rev stm32l43_l44xx_revs[] = { { 0x1000, "A" }, { 0x1001, "Z" }, { 0x2001, "Y" }, }; @@ -433,6 +437,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = { .otp_base = 0x1FFF7000, .otp_size = 1024, }, + { + .id = DEVID_STM32U3CXX, + .revs = stm32u3cxx_revs, + .num_revs = ARRAY_SIZE(stm32u3cxx_revs), + .device_str = "STM32U3Cxx", + .max_flash_size_kb = 2048, + .flags = F_HAS_DUAL_BANK | F_HAS_TZ | F_HAS_L5_FLASH_REGS | F_WRP_HAS_LOCK, + .flash_regs_base = 0x40022000, + .fsize_addr = 0x0BFA07A0, + .otp_base = 0x0BFA0000, + .otp_size = 512, + }, { .id = DEVID_STM32L43_L44XX, .revs = stm32l43_l44xx_revs, @@ -2192,6 +2208,7 @@ static int stm32l4_probe(struct flash_bank *bank) stm32l4_info->bank1_sectors = num_pages / 2; } break; + case DEVID_STM32U3CXX: case DEVID_STM32U37_U38XX: page_size_kb = 4; num_pages = flash_size_kb / page_size_kb; diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h index 10819367d9..20817cdcf1 100644 --- a/src/flash/nor/stm32l4x.h +++ b/src/flash/nor/stm32l4x.h @@ -89,6 +89,7 @@ /* Supported device IDs */ #define DEVID_STM32L47_L48XX 0x415 +#define DEVID_STM32U3CXX 0x42A #define DEVID_STM32L43_L44XX 0x435 #define DEVID_STM32C01XX 0x443 #define DEVID_STM32C05XX 0x44C --
