This is an automated email from Gerrit. "Antonio Borneo <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9552
-- gerrit commit 9ad0294e373e1bd42c9cdcb4a18baae82fe9951a Author: Antonio Borneo <[email protected]> Date: Sun Mar 29 23:29:18 2026 +0200 openocd: simplify return path dropping temp variable Detect the pattern: variable = expression; return variable; replace it with: return expression; and if the temporarily variable is not anymore used, remove it. This patch has been implemented with a simple coccinelle script // Step 1: simplify `v = e; return v;` -> `return e;` @@ identifier v; expression e; @@ - v = e; - return v; + return e; // Step 2: drop declaration of v if it is never used @@ identifier v; type T; @@ - T v; ... when != v which is nice but not fully trustable as it: - uses default 8 space TAB indentation; - replaces also non-local variables; - drops comments at the end of the modified line; - doesn't drop useless parenthesis. Also some replacement makes the code less readable, so the whole has been manually checked and fixed. While step 1 in the script is very fast, step 2 is deadly slow. Change-Id: Id7a8e3f03696f2fbb0237e4a71add0d5ccc1b7df Signed-off-by: Antonio Borneo <[email protected]> diff --git a/src/flash/nand/arm_io.c b/src/flash/nand/arm_io.c index dd012e161a..8261c6386d 100644 --- a/src/flash/nand/arm_io.c +++ b/src/flash/nand/arm_io.c @@ -56,10 +56,8 @@ static int arm_code_to_working_area(struct target *target, target_buffer_set_u32_array(target, code_buf, code_size / 4, code); /* copy code to work area */ - retval = target_write_memory(target, (*area)->address, + return target_write_memory(target, (*area)->address, 4, code_size / 4, code_buf); - - return retval; } /** @@ -282,7 +280,5 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size) destroy_reg_param(®_params[2]); /* read from work area to the host's memory */ - retval = target_read_buffer(target, target_buf, size, data); - - return retval; + return target_read_buffer(target, target_buf, size, data); } diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c index 41cb07bc90..acc9e36348 100644 --- a/src/flash/nand/at91sam9.c +++ b/src/flash/nand/at91sam9.c @@ -250,15 +250,12 @@ static int at91sam9_read_block_data(struct nand_device *nand, uint8_t *data, int { struct at91sam9_nand *info = nand->controller_priv; struct arm_nand_data *io = &info->io; - int status; if (!at91sam9_halted(nand->target, "read block")) return ERROR_NAND_OPERATION_FAILED; io->chunk_size = nand->page_size; - status = arm_nandread(io, data, size); - - return status; + return arm_nandread(io, data, size); } /** @@ -274,15 +271,12 @@ static int at91sam9_write_block_data(struct nand_device *nand, uint8_t *data, in { struct at91sam9_nand *info = nand->controller_priv; struct arm_nand_data *io = &info->io; - int status; if (!at91sam9_halted(nand->target, "write block")) return ERROR_NAND_OPERATION_FAILED; io->chunk_size = nand->page_size; - status = arm_nandwrite(io, data, size); - - return status; + return arm_nandwrite(io, data, size); } /** @@ -469,9 +463,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page, return retval; } - retval = nand_write_finish(nand); - - return retval; + return nand_write_finish(nand); } /** diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c index d221c34d9e..050c636645 100644 --- a/src/flash/nand/lpc3180.c +++ b/src/flash/nand/lpc3180.c @@ -88,7 +88,6 @@ static float lpc3180_cycle_time(struct nand_device *nand) int sysclk; int hclk; int hclk_pll; - float cycle; /* calculate timings */ @@ -119,9 +118,7 @@ static float lpc3180_cycle_time(struct nand_device *nand) LOG_DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk); - cycle = (1.0 / hclk) * 1000000.0; - - return cycle; + return (1.0 / hclk) * 1000000.0; } static int lpc3180_init(struct nand_device *nand) diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c index c67f2aa303..132a579d33 100644 --- a/src/flash/nand/lpc32xx.c +++ b/src/flash/nand/lpc32xx.c @@ -121,7 +121,6 @@ static float lpc32xx_cycle_time(struct nand_device *nand) int sysclk; int hclk; int hclk_pll; - float cycle; int retval; /* calculate timings */ @@ -169,9 +168,7 @@ static float lpc32xx_cycle_time(struct nand_device *nand) LOG_DEBUG("LPC32xx HCLK currently clocked at %i kHz", hclk); - cycle = (1.0 / hclk) * 1000000.0; - - return cycle; + return (1.0 / hclk) * 1000000.0; } static int lpc32xx_init(struct nand_device *nand) diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index 5f551681d5..2479505626 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -69,10 +69,7 @@ static float _tomhz(uint32_t freq_hz) { - float f; - - f = ((float)(freq_hz)) / 1000000.0; - return f; + return ((float)freq_hz) / 1000000.0; } /* How the chip is configured. */ diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index dd3a1ca3f0..a2d720cce4 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -64,10 +64,7 @@ static float _tomhz(uint32_t freq_hz) { - float f; - - f = ((float)(freq_hz)) / 1000000.0; - return f; + return ((float)freq_hz) / 1000000.0; } /* How the chip is configured. */ diff --git a/src/flash/nor/at91sam4l.c b/src/flash/nor/at91sam4l.c index 1db15377eb..f6aff73b74 100644 --- a/src/flash/nor/at91sam4l.c +++ b/src/flash/nor/at91sam4l.c @@ -185,9 +185,7 @@ static int sam4l_flash_command(struct target *target, uint8_t cmd, int page) if (err != 0) LOG_ERROR("%s got error status 0x%08" PRIx32, __func__, err); - res = sam4l_flash_wait_until_ready(target); - - return res; + return sam4l_flash_wait_until_ready(target); } FLASH_BANK_COMMAND_HANDLER(sam4l_flash_bank_command) @@ -505,9 +503,7 @@ static int sam4l_write_page(struct sam4l_info *chip, struct target *target, res = sam4l_flash_command(target, SAM4L_FCMD_EP, -1); if (res != ERROR_OK) return res; - res = sam4l_flash_command(target, SAM4L_FCMD_WP, -1); - - return res; + return sam4l_flash_command(target, SAM4L_FCMD_WP, -1); } /* Write partial contents into page-aligned 'address' on the Flash from host diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c index de0b7dd1d2..20f9bedfdc 100644 --- a/src/flash/nor/atsamv.c +++ b/src/flash/nor/atsamv.c @@ -559,12 +559,8 @@ static int samv_read_standard_page(struct target *target, static int samv_read_user_signature(struct target *target, uint8_t *buf) { - int r; - - r = samv_efc_read_sequence(target, SAMV_EFC_FCMD_STUS, SAMV_EFC_FCMD_SPUS, - buf, SAMV_PAGE_SIZE); - - return r; + return samv_efc_read_sequence(target, SAMV_EFC_FCMD_STUS, + SAMV_EFC_FCMD_SPUS, buf, SAMV_PAGE_SIZE); } static int samv_page_read(struct target *target, diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c index 48f4493ab6..486f6d4353 100644 --- a/src/flash/nor/fm3.c +++ b/src/flash/nor/fm3.c @@ -309,8 +309,7 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, write_algorithm->address, 0, 100000, &armv7m_info); if (retval != ERROR_OK) { LOG_ERROR("Error executing flash erase programming algorithm"); - retval = ERROR_FLASH_OPERATION_FAILED; - return retval; + return ERROR_FLASH_OPERATION_FAILED; } retval = fm3_busy_wait(target, offset, 500); @@ -329,9 +328,8 @@ static int fm3_erase(struct flash_bank *bank, unsigned int first, if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */ - - return retval; + // dummy read of FASZR + return target_read_u32(target, 0x40000000, &u32_dummy_read); } static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, @@ -907,8 +905,7 @@ static int fm3_chip_erase(struct flash_bank *bank) write_algorithm->address, 0, 100000, &armv7m_info); if (retval != ERROR_OK) { LOG_ERROR("Error executing flash erase programming algorithm"); - retval = ERROR_FLASH_OPERATION_FAILED; - return retval; + return ERROR_FLASH_OPERATION_FAILED; } target_free_working_area(target, write_algorithm); @@ -925,9 +922,8 @@ static int fm3_chip_erase(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, 0x40000000, &u32_dummy_read); /* dummy read of FASZR */ - - return retval; + // dummy read of FASZR + return target_read_u32(target, 0x40000000, &u32_dummy_read); } COMMAND_HANDLER(fm3_handle_chip_erase_command) diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 82e68de3fb..266b447c04 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -1224,7 +1224,6 @@ static int kinetis_disable_wdog(struct kinetis_chip *k_chip) COMMAND_HANDLER(kinetis_disable_wdog_handler) { - int result; struct target *target = get_current_target(CMD_CTX); struct kinetis_chip *k_chip = kinetis_get_chip(target); @@ -1234,8 +1233,7 @@ COMMAND_HANDLER(kinetis_disable_wdog_handler) if (CMD_ARGC > 0) return ERROR_COMMAND_SYNTAX_ERROR; - result = kinetis_disable_wdog(k_chip); - return result; + return kinetis_disable_wdog(k_chip); } @@ -1589,8 +1587,7 @@ static int kinetis_read_pmstat(struct kinetis_chip *k_chip, uint8_t *pmstat) switch (k_chip->sysmodectrlr_type) { case KINETIS_SMC: - result = target_read_u8(target, SMC_PMSTAT, pmstat); - return result; + return target_read_u8(target, SMC_PMSTAT, pmstat); case KINETIS_SMC32: result = target_read_u32(target, SMC32_PMSTAT, &stat32); diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c index f950f21db7..c5db16c92a 100644 --- a/src/flash/nor/lpcspifi.c +++ b/src/flash/nor/lpcspifi.c @@ -445,11 +445,10 @@ static int lpcspifi_erase(struct flash_bank *bank, unsigned int first, " Will use bulk erase instead of sector-by-sector erase."); retval = lpcspifi_bulk_erase(bank); - if (retval == ERROR_OK) { - retval = lpcspifi_set_hw_mode(bank); - return retval; - } else - LOG_WARNING("Bulk flash erase failed. Falling back to sector-by-sector erase."); + if (retval == ERROR_OK) + return lpcspifi_set_hw_mode(bank); + + LOG_WARNING("Bulk flash erase failed. Falling back to sector-by-sector erase."); } if (lpcspifi_info->dev->erase_cmd == 0x00) @@ -554,9 +553,7 @@ static int lpcspifi_erase(struct flash_bank *bank, unsigned int first, destroy_reg_param(®_params[2]); destroy_reg_param(®_params[3]); - retval = lpcspifi_set_hw_mode(bank); - - return retval; + return lpcspifi_set_hw_mode(bank); } static int lpcspifi_protect(struct flash_bank *bank, int set, @@ -749,8 +746,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, destroy_reg_param(®_params[4]); /* Switch to HW mode before return to prompt */ - retval = lpcspifi_set_hw_mode(bank); - return retval; + return lpcspifi_set_hw_mode(bank); } /* Return ID of flash device */ diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c index d7cc253ae5..ac87098b3c 100644 --- a/src/flash/nor/msp432.c +++ b/src/flash/nor/msp432.c @@ -199,9 +199,7 @@ static int msp432_exec_cmd(struct target *target, struct msp432_algo_params return retval; /* Write out command to target memory */ - retval = target_write_u32(target, ALGO_FLASH_COMMAND_ADDR, command); - - return retval; + return target_write_u32(target, ALGO_FLASH_COMMAND_ADDR, command); } static int msp432_wait_return_code(struct target *target) @@ -393,9 +391,7 @@ static int msp432_init(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - retval = msp432_wait_return_code(target); - - return retval; + return msp432_wait_return_code(target); } static int msp432_quit(struct flash_bank *bank) diff --git a/src/flash/nor/niietcm4.c b/src/flash/nor/niietcm4.c index aaf0726550..4251d13dfe 100644 --- a/src/flash/nor/niietcm4.c +++ b/src/flash/nor/niietcm4.c @@ -1165,10 +1165,8 @@ static int niietcm4_erase(struct flash_bank *bank, unsigned int first, return ERROR_TARGET_NOT_HALTED; } - if ((first == 0) && (last == (bank->num_sectors - 1))) { - retval = niietcm4_mass_erase(bank); - return retval; - } + if (first == 0 && last == (bank->num_sectors - 1)) + return niietcm4_mass_erase(bank); /* chose between main bootflash and info bootflash */ uint32_t flash_cmd, flash_addr; diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c index 5cb552aa94..b92bb5b7cb 100644 --- a/src/flash/nor/nrf5.c +++ b/src/flash/nor/nrf5.c @@ -796,8 +796,8 @@ static int nrf5_read_ficr_more_info(struct nrf5_info *chip) if (res != ERROR_OK) return res; - res = target_read_u32(target, ficr_base + ficr_offsets->info_flash, &chip->ficr_info.flash); - return res; + return target_read_u32(target, ficr_base + ficr_offsets->info_flash, + &chip->ficr_info.flash); } /* nRF51 series only */ @@ -1121,8 +1121,7 @@ static int nrf5_erase_page(struct flash_bank *bank, return res; } - res = nrf5_wait_for_nvmc(chip); - return res; + return nrf5_wait_for_nvmc(chip); } /* Start a low level flash write for the specified region */ diff --git a/src/flash/nor/psoc5lp.c b/src/flash/nor/psoc5lp.c index 6b46e39023..e51c1cb1c0 100644 --- a/src/flash/nor/psoc5lp.c +++ b/src/flash/nor/psoc5lp.c @@ -237,8 +237,7 @@ static int psoc5lp_get_device_id(struct target *target, uint32_t *id) retval = target_read_u32(target, PANTHER_DEVICE_ID, id); /* dummy read */ if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, PANTHER_DEVICE_ID, id); - return retval; + return target_read_u32(target, PANTHER_DEVICE_ID, id); } static int psoc5lp_find_device(struct target *target, @@ -297,8 +296,7 @@ static int psoc5lp_spc_write_opcode(struct target *target, uint8_t opcode) retval = target_write_u8(target, SPC_CPU_DATA, SPC_KEY2 + opcode); if (retval != ERROR_OK) return retval; - retval = target_write_u8(target, SPC_CPU_DATA, opcode); - return retval; + return target_write_u8(target, SPC_CPU_DATA, opcode); } static void psoc5lp_spc_write_opcode_buffer(struct target *target, diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c index 3c7b06666b..b53be7847b 100644 --- a/src/flash/nor/psoc6.c +++ b/src/flash/nor/psoc6.c @@ -868,9 +868,7 @@ COMMAND_HANDLER(psoc6_handle_mass_erase_command) if (hr != ERROR_OK) return hr; - hr = psoc6_erase(bank, 0, bank->num_sectors - 1); - - return hr; + return psoc6_erase(bank, 0, bank->num_sectors - 1); } /** *********************************************************************************************** diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 70b5261119..003b36f392 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -2508,8 +2508,7 @@ COMMAND_HANDLER(stm32l4_handle_option_write_command) "INFO: a reset or power cycle is required " "for the new settings to take effect.", bank->driver->name); - retval = stm32l4_write_option(bank, reg_offset, value, mask); - return retval; + return stm32l4_write_option(bank, reg_offset, value, mask); } COMMAND_HANDLER(stm32l4_handle_trustzone_command) diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index f0e8db5ba4..2e949c5dba 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -1076,10 +1076,8 @@ static int stm32lx_enable_write_half_page(struct flash_bank *bank) return retval; reg32 |= FLASH_PECR__PROG; - retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR, + return target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR, reg32); - - return retval; } static int stm32lx_lock_program_memory(struct flash_bank *bank) diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c index bd72fe050e..174643b7e6 100644 --- a/src/flash/nor/stmqspi.c +++ b/src/flash/nor/stmqspi.c @@ -1800,9 +1800,7 @@ static int find_sfdp_dummy(struct flash_bank *bank, int len) err: /* Abort operation */ - retval = stmqspi_abort(bank); - - return retval; + return stmqspi_abort(bank); } /* Read SFDP parameter block */ diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c index be0089879a..b7156a1ae2 100644 --- a/src/flash/nor/str9xpec.c +++ b/src/flash/nor/str9xpec.c @@ -171,7 +171,6 @@ static int str9xpec_isc_disable(struct flash_bank *bank) static int str9xpec_read_config(struct flash_bank *bank) { struct scan_field field; - uint8_t status; struct jtag_tap *tap; struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv; @@ -190,9 +189,7 @@ static int str9xpec_read_config(struct flash_bank *bank) jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); jtag_execute_queue(); - status = str9xpec_isc_status(tap); - - return status; + return str9xpec_isc_status(tap); } static int str9xpec_build_block_list(struct flash_bank *bank) @@ -487,11 +484,7 @@ static int str9xpec_lock_device(struct flash_bank *bank) static int str9xpec_unlock_device(struct flash_bank *bank) { - uint8_t status; - - status = str9xpec_erase_area(bank, 0, 255); - - return status; + return str9xpec_erase_area(bank, 0, 255); } static int str9xpec_protect(struct flash_bank *bank, int set, diff --git a/src/flash/nor/swm050.c b/src/flash/nor/swm050.c index dcf59d380e..880c44e198 100644 --- a/src/flash/nor/swm050.c +++ b/src/flash/nor/swm050.c @@ -67,8 +67,7 @@ static int swm050_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); - retval = ERROR_TARGET_NOT_HALTED; - return retval; + return ERROR_TARGET_NOT_HALTED; } /* Perform write */ diff --git a/src/flash/nor/xmc4xxx.c b/src/flash/nor/xmc4xxx.c index bf41cc7eb1..ceed055fcb 100644 --- a/src/flash/nor/xmc4xxx.c +++ b/src/flash/nor/xmc4xxx.c @@ -522,9 +522,7 @@ static int xmc4xxx_erase_sector(struct flash_bank *bank, uint32_t address, } /* Now we must wait for the erase operation to end */ - res = xmc4xxx_wait_status_busy(bank, FLASH_OP_TIMEOUT); - - return res; + return xmc4xxx_wait_status_busy(bank, FLASH_OP_TIMEOUT); } static int xmc4xxx_erase(struct flash_bank *bank, unsigned int first, @@ -569,8 +567,7 @@ static int xmc4xxx_erase(struct flash_bank *bank, unsigned int first, } clear_status_and_exit: - res = xmc4xxx_clear_flash_status(bank); - return res; + return xmc4xxx_clear_flash_status(bank); } @@ -1131,7 +1128,6 @@ static int xmc4xxx_flash_protect(struct flash_bank *bank, int level, bool read_p static int xmc4xxx_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last) { - int ret; struct xmc4xxx_flash_bank *fb = bank->driver_priv; /* Check for flash passwords */ @@ -1144,14 +1140,11 @@ static int xmc4xxx_protect(struct flash_bank *bank, int set, unsigned int first, if (set == 0) { LOG_WARNING("Flash protection will be temporarily disabled" " for all pages (User 0 only)!"); - ret = xmc4xxx_temp_unprotect(bank, 0); - return ret; + return xmc4xxx_temp_unprotect(bank, 0); } /* Install write protection for user 0 on the specified pages */ - ret = xmc4xxx_flash_protect(bank, 0, false, first, last); - - return ret; + return xmc4xxx_flash_protect(bank, 0, false, first, last); } static int xmc4xxx_protect_check(struct flash_bank *bank) @@ -1290,9 +1283,7 @@ COMMAND_HANDLER(xmc4xxx_handle_flash_unprotect_command) COMMAND_PARSE_NUMBER(s32, CMD_ARGV[1], level); - res = xmc4xxx_flash_unprotect(bank, level); - - return res; + return xmc4xxx_flash_unprotect(bank, level); } static const struct command_registration xmc4xxx_exec_command_handlers[] = { diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c index 7eab94bd0a..7a1a93c1b6 100644 --- a/src/jtag/drivers/buspirate.c +++ b/src/jtag/drivers/buspirate.c @@ -1157,9 +1157,7 @@ static unsigned char buspirate_jtag_command(int fd, /* TODO add support for WIN32 and others ! */ static int buspirate_serial_open(char *port) { - int fd; - fd = open(buspirate_port, O_RDWR | O_NOCTTY | O_NDELAY); - return fd; + return open(buspirate_port, O_RDWR | O_NOCTTY | O_NDELAY); } diff --git a/src/jtag/drivers/dmem.c b/src/jtag/drivers/dmem.c index 0f1b582990..85f3345526 100644 --- a/src/jtag/drivers/dmem.c +++ b/src/jtag/drivers/dmem.c @@ -102,13 +102,9 @@ static void dmem_emu_set_ap_reg(uint32_t addr, uint32_t val) static uint32_t dmem_emu_get_ap_reg(uint32_t addr) { - uint32_t val; - addr &= ~ARM_APB_PADDR31; - val = *(volatile uint32_t *)((uintptr_t)dmem_emu_virt_base_addr + addr); - - return val; + return *(volatile uint32_t *)((uintptr_t)dmem_emu_virt_base_addr + addr); } static int dmem_emu_ap_q_read(unsigned int ap_idx, unsigned int reg, uint32_t *data) diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c index 83c6d68530..3be786d7bc 100644 --- a/src/jtag/drivers/rlink.c +++ b/src/jtag/drivers/rlink.c @@ -432,14 +432,8 @@ static int dtc_start_download(void) return usb_err; /* wait for completion */ - usb_err = jtag_libusb_bulk_read( - hdev, USB_EP1IN_ADDR, - (char *)&ep2txr, 1, - LIBUSB_TIMEOUT_MS, - &transferred - ); - - return usb_err; + return jtag_libusb_bulk_read(hdev, USB_EP1IN_ADDR, (char *)&ep2txr, 1, + LIBUSB_TIMEOUT_MS, &transferred); } static int dtc_run_download( @@ -807,8 +801,7 @@ static int tap_state_queue_run(void) tap_state_queue.buffer >>= 1; } - retval = tap_state_queue_init(); - return retval; + return tap_state_queue_init(); } static int tap_state_queue_append(uint8_t tms) diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index b4d21100cc..eaaf7a7cbf 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -2303,16 +2303,13 @@ static int stlink_usb_reset(void *handle) /** */ static int stlink_usb_run(void *handle) { - int res; struct stlink_usb_handle *h = handle; assert(handle); - if (h->version.jtag_api != STLINK_JTAG_API_V1) { - res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_DEBUGEN); - - return res; - } + if (h->version.jtag_api != STLINK_JTAG_API_V1) + return stlink_usb_write_debug_reg(handle, DCB_DHCSR, + DBGKEY | C_DEBUGEN); stlink_usb_init_buffer(handle, h->rx_ep, 2); @@ -2325,16 +2322,13 @@ static int stlink_usb_run(void *handle) /** */ static int stlink_usb_halt(void *handle) { - int res; struct stlink_usb_handle *h = handle; assert(handle); - if (h->version.jtag_api != STLINK_JTAG_API_V1) { - res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_DEBUGEN); - - return res; - } + if (h->version.jtag_api != STLINK_JTAG_API_V1) + return stlink_usb_write_debug_reg(handle, DCB_DHCSR, + DBGKEY | C_HALT | C_DEBUGEN); stlink_usb_init_buffer(handle, h->rx_ep, 2); @@ -4284,8 +4278,6 @@ static int stlink_dap_dp_read(struct adiv5_dap *dap, unsigned int reg, uint32_t /** */ static int stlink_dap_dp_write(struct adiv5_dap *dap, unsigned int reg, uint32_t data) { - int retval; - if (!(stlink_dap_handle->version.flags & STLINK_F_HAS_DPBANKSEL)) if (reg & 0x000000F0) { LOG_ERROR("Banked DP registers not supported in current STLink FW"); @@ -4302,9 +4294,8 @@ static int stlink_dap_dp_write(struct adiv5_dap *dap, unsigned int reg, uint32_t if (reg == DP_CTRL_STAT) data &= ~CORUNDETECT; - retval = stlink_write_dap_register(stlink_dap_handle, + return stlink_write_dap_register(stlink_dap_handle, STLINK_DEBUG_PORT_ACCESS, reg, data); - return retval; } /** */ diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c index ce2d21e0ea..eb4e815e58 100644 --- a/src/jtag/drivers/ulink.c +++ b/src/jtag/drivers/ulink.c @@ -2220,8 +2220,6 @@ static int ulink_quit(void) */ COMMAND_HANDLER(ulink_download_firmware_handler) { - int ret; - if (CMD_ARGC != 1) return ERROR_COMMAND_SYNTAX_ERROR; @@ -2229,10 +2227,8 @@ COMMAND_HANDLER(ulink_download_firmware_handler) LOG_INFO("Downloading ULINK firmware image %s", CMD_ARGV[0]); /* Download firmware image in CMD_ARGV[0] */ - ret = ulink_load_firmware_and_renumerate(&ulink_handle, CMD_ARGV[0], + return ulink_load_firmware_and_renumerate(&ulink_handle, CMD_ARGV[0], ULINK_RENUMERATION_DELAY); - - return ret; } /*************************** Command Registration **************************/ diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c index 75d6a4f815..497f97f63f 100644 --- a/src/jtag/drivers/xds110.c +++ b/src/jtag/drivers/xds110.c @@ -657,26 +657,18 @@ static bool xds_execute(uint32_t out_length, uint32_t in_length, static bool xds_connect(void) { - bool success; - xds110.write_payload[0] = XDS_CONNECT; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool xds_disconnect(void) { - bool success; - xds110.write_payload[0] = XDS_DISCONNECT; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool xds_version(uint32_t *firmware_id, uint16_t *hardware_id) @@ -705,48 +697,36 @@ static bool xds_set_tck_delay(uint32_t delay) { uint8_t *delay_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 32-bits */ - bool success; - xds110.write_payload[0] = XDS_SET_TCK; xds110_set_u32(delay_pntr, delay); - success = xds_execute(XDS_OUT_LEN + 4, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 4, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool xds_set_trst(uint8_t trst) { uint8_t *trst_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 8-bits */ - bool success; - xds110.write_payload[0] = XDS_SET_TRST; *trst_pntr = trst; - success = xds_execute(XDS_OUT_LEN + 1, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 1, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool xds_cycle_tck(uint32_t count) { uint8_t *count_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 32-bits */ - bool success; - xds110.write_payload[0] = XDS_CYCLE_TCK; xds110_set_u32(count_pntr, count); - success = xds_execute(XDS_OUT_LEN + 4, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 4, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool xds_goto_state(uint32_t state) @@ -754,17 +734,13 @@ static bool xds_goto_state(uint32_t state) uint8_t *state_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 32-bits */ uint8_t *transit_pntr = &xds110.write_payload[XDS_OUT_LEN+4]; /* 32-bits */ - bool success; - xds110.write_payload[0] = XDS_GOTO_STATE; xds110_set_u32(state_pntr, state); xds110_set_u32(transit_pntr, XDS_JTAG_TRANSIT_QUICKEST); - success = xds_execute(XDS_OUT_LEN+8, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 8, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool xds_jtag_scan(uint32_t shift_state, uint16_t shift_bits, @@ -817,16 +793,12 @@ static bool xds_set_srst(uint8_t srst) { uint8_t *srst_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 8-bits */ - bool success; - xds110.write_payload[0] = XDS_SET_SRST; *srst_pntr = srst; - success = xds_execute(XDS_OUT_LEN + 1, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 1, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool cmapi_connect(uint32_t *idcode) @@ -850,38 +822,26 @@ static bool cmapi_connect(uint32_t *idcode) static bool cmapi_disconnect(void) { - bool success; - xds110.write_payload[0] = CMAPI_DISCONNECT; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool cmapi_acquire(void) { - bool success; - xds110.write_payload[0] = CMAPI_ACQUIRE; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool cmapi_release(void) { - bool success; - xds110.write_payload[0] = CMAPI_RELEASE; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool cmapi_read_dap_reg(uint32_t type, uint32_t ap_num, @@ -919,8 +879,6 @@ static bool cmapi_write_dap_reg(uint32_t type, uint32_t ap_num, uint8_t *address_pntr = &xds110.write_payload[XDS_OUT_LEN + 2]; /* 8-bits */ uint8_t *value_pntr = &xds110.write_payload[XDS_OUT_LEN + 3]; /* 32-bits */ - bool success; - if (!value) return false; @@ -931,62 +889,44 @@ static bool cmapi_write_dap_reg(uint32_t type, uint32_t ap_num, *address_pntr = (uint8_t)(address & 0xff); xds110_set_u32(value_pntr, *value); - success = xds_execute(XDS_OUT_LEN + 7, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 7, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool swd_connect(void) { - bool success; - xds110.write_payload[0] = SWD_CONNECT; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool swd_disconnect(void) { - bool success; - xds110.write_payload[0] = SWD_DISCONNECT; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool cjtag_connect(uint32_t format) { uint8_t *format_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 32-bits */ - bool success; - xds110.write_payload[0] = CJTAG_CONNECT; xds110_set_u32(format_pntr, format); - success = xds_execute(XDS_OUT_LEN + 4, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 4, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool cjtag_disconnect(void) { - bool success; - xds110.write_payload[0] = CJTAG_DISCONNECT; - success = xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool xds_set_supply(uint32_t voltage) @@ -994,17 +934,13 @@ static bool xds_set_supply(uint32_t voltage) uint8_t *volts_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 32-bits */ uint8_t *source_pntr = &xds110.write_payload[XDS_OUT_LEN + 4]; /* 8-bits */ - bool success; - xds110.write_payload[0] = XDS_SET_SUPPLY; xds110_set_u32(volts_pntr, voltage); *source_pntr = (uint8_t)(voltage != 0 ? 1 : 0); - success = xds_execute(XDS_OUT_LEN + 5, XDS_IN_LEN, DEFAULT_ATTEMPTS, + return xds_execute(XDS_OUT_LEN + 5, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } static bool ocd_dap_request(uint8_t *dap_requests, uint32_t request_size, @@ -1062,8 +998,6 @@ static bool ocd_pathmove(uint32_t num_states, uint8_t *path) uint8_t *num_pntr = &xds110.write_payload[XDS_OUT_LEN + 0]; /* 32-bits */ uint8_t *path_pntr = &xds110.write_payload[XDS_OUT_LEN + 4]; - bool success; - if (!path) return false; @@ -1073,10 +1007,8 @@ static bool ocd_pathmove(uint32_t num_states, uint8_t *path) memcpy((void *)path_pntr, (void *)path, num_states); - success = xds_execute(XDS_OUT_LEN + 4 + num_states, XDS_IN_LEN, + return xds_execute(XDS_OUT_LEN + 4 + num_states, XDS_IN_LEN, DEFAULT_ATTEMPTS, DEFAULT_TIMEOUT); - - return success; } /*************************************************************************** diff --git a/src/pld/efinix.c b/src/pld/efinix.c index b6e5f9e477..6bdc1bec2b 100644 --- a/src/pld/efinix.c +++ b/src/pld/efinix.c @@ -199,9 +199,7 @@ static int efinix_load(struct pld_device *pld_device, const char *filename) /* entering RUN/TEST for 100 cycles */ jtag_add_runtest(RUNTEST_FINISH_CYCLES, TAP_IDLE); - retval = jtag_execute_queue(); - - return retval; + return jtag_execute_queue(); } static int efinix_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub) diff --git a/src/pld/gowin.c b/src/pld/gowin.c index bbc2fe15f6..f34d553a95 100644 --- a/src/pld/gowin.c +++ b/src/pld/gowin.c @@ -421,9 +421,7 @@ static int gowin_load_to_sram(struct pld_device *pld_device, const char *filenam if (retval != ERROR_OK) return retval; - retval = jtag_execute_queue(); - - return retval; + return jtag_execute_queue(); } static int gowin_read_register_command(struct pld_device *pld_device, uint32_t cmd, uint32_t *value) diff --git a/src/rtos/linux.c b/src/rtos/linux.c index 5f59dc883a..625e847401 100644 --- a/src/rtos/linux.c +++ b/src/rtos/linux.c @@ -147,10 +147,7 @@ static int fill_buffer(struct target *target, uint32_t addr, uint8_t *buffer) static uint32_t get_buffer(struct target *target, const uint8_t *buffer) { - uint32_t value = 0; - const uint8_t *value_ptr = buffer; - value = target_buffer_get_u32(target, value_ptr); - return value; + return target_buffer_get_u32(target, buffer); } static int linux_os_thread_reg_list(struct rtos *rtos, diff --git a/src/server/ipdbg.c b/src/server/ipdbg.c index 466717c468..bc04a571b8 100644 --- a/src/server/ipdbg.c +++ b/src/server/ipdbg.c @@ -381,9 +381,7 @@ static int ipdbg_shift_vir(struct ipdbg_hub *hub) ipdbg_init_scan_field(hub->scratch_memory.fields, NULL, hub->virtual_ir->length, hub->scratch_memory.vir_out_val); jtag_add_dr_scan(tap, 1, hub->scratch_memory.fields, TAP_IDLE); - retval = jtag_execute_queue(); - - return retval; + return jtag_execute_queue(); } static int ipdbg_shift_data(struct ipdbg_hub *hub, uint32_t dn_data, uint32_t *up_data) diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 032a0da9a0..14fc14dd0d 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -263,12 +263,9 @@ static int aarch64_dap_write_memap_register_u32(struct target *target, target_addr_t address, uint32_t value) { - int retval; struct armv8_common *armv8 = target_to_armv8(target); - retval = mem_ap_write_atomic_u32(armv8->debug_ap, address, value); - - return retval; + return mem_ap_write_atomic_u32(armv8->debug_ap, address, value); } static int aarch64_dpm_setup(struct aarch64_common *a8, uint64_t debug) diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 3f7686fb74..7d25e51683 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -157,8 +157,7 @@ static int arm720t_disable_mmu_caches(struct target *target, if (d_u_cache || i_cache) cp15_control &= ~0x4U; - retval = arm720t_write_cp15(target, 0xee010f10, cp15_control); - return retval; + return arm720t_write_cp15(target, 0xee010f10, cp15_control); } static int arm720t_enable_mmu_caches(struct target *target, @@ -181,8 +180,7 @@ static int arm720t_enable_mmu_caches(struct target *target, if (d_u_cache || i_cache) cp15_control |= 0x4U; - retval = arm720t_write_cp15(target, 0xee010f10, cp15_control); - return retval; + return arm720t_write_cp15(target, 0xee010f10, cp15_control); } static int arm720t_post_debug_entry(struct target *target) @@ -211,8 +209,7 @@ static int arm720t_post_debug_entry(struct target *target) retval = arm720t_read_cp15(target, 0xee160f10, &arm720t->far_reg); if (retval != ERROR_OK) return retval; - retval = jtag_execute_queue(); - return retval; + return jtag_execute_queue(); } static void arm720t_pre_restore_context(struct target *target) diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 441e423054..291b7bc49e 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -363,8 +363,7 @@ int arm920t_disable_mmu_caches(struct target *target, int mmu, if (i_cache) cp15_control &= ~0x1000U; - retval = arm920t_write_cp15_physical(target, CP15PHYS_CTRL, cp15_control); - return retval; + return arm920t_write_cp15_physical(target, CP15PHYS_CTRL, cp15_control); } /* EXPORTED to FA256 */ @@ -391,8 +390,7 @@ int arm920t_enable_mmu_caches(struct target *target, int mmu, if (i_cache) cp15_control |= 0x1000U; - retval = arm920t_write_cp15_physical(target, CP15PHYS_CTRL, cp15_control); - return retval; + return arm920t_write_cp15_physical(target, CP15PHYS_CTRL, cp15_control); } /* EXPORTED to FA256 */ @@ -556,11 +554,7 @@ static int arm920_virt2phys(struct target *target, int arm920t_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - int retval; - - retval = arm7_9_read_memory(target, address, size, count, buffer); - - return retval; + return arm7_9_read_memory(target, address, size, count, buffer); } diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index 98fe6bf68d..4d0a444064 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -383,8 +383,7 @@ static int arm926ejs_disable_mmu_caches(struct target *target, int mmu, cp15_control &= ~0x1000U; } - retval = arm926ejs->write_cp15(target, 0, 0, 1, 0, cp15_control); - return retval; + return arm926ejs->write_cp15(target, 0, 0, 1, 0, cp15_control); } static int arm926ejs_enable_mmu_caches(struct target *target, int mmu, @@ -411,8 +410,7 @@ static int arm926ejs_enable_mmu_caches(struct target *target, int mmu, if (i_cache) cp15_control |= 0x1000U; - retval = arm926ejs->write_cp15(target, 0, 0, 1, 0, cp15_control); - return retval; + return arm926ejs->write_cp15(target, 0, 0, 1, 0, cp15_control); } static int arm926ejs_post_debug_entry(struct target *target) @@ -469,8 +467,7 @@ static int arm926ejs_post_debug_entry(struct target *target) if (retval != ERROR_OK) return retval; cache_dbg_ctrl |= 0x7; - retval = arm926ejs->write_cp15(target, 7, 0, 15, 0, cache_dbg_ctrl); - return retval; + return arm926ejs->write_cp15(target, 7, 0, 15, 0, cache_dbg_ctrl); } static void arm926ejs_pre_restore_context(struct target *target) diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c index 5eb31d8c08..12967ea460 100644 --- a/src/target/armv7a_cache.c +++ b/src/target/armv7a_cache.c @@ -108,8 +108,7 @@ static int armv7a_l1_d_cache_clean_inval_all(struct target *target) armv7a_l1_d_cache_flush_level(dpm, &cache->arch[cl].d_u_size, cl); } - retval = dpm->finish(dpm); - return retval; + return dpm->finish(dpm); done: LOG_ERROR("clean invalidate failed"); diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 07f1f6fc90..6db7355304 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -243,7 +243,6 @@ const char *armv7m_exception_string(int number) static int armv7m_get_core_reg(struct reg *reg) { - int retval; struct arm_reg *armv7m_reg = reg->arch_info; struct target *target = armv7m_reg->target; struct arm *arm = target_to_arm(target); @@ -251,9 +250,7 @@ static int armv7m_get_core_reg(struct reg *reg) if (target->state != TARGET_HALTED) return ERROR_TARGET_NOT_HALTED; - retval = arm->read_core_reg(target, reg, reg->number, arm->core_mode); - - return retval; + return arm->read_core_reg(target, reg, reg->number, arm->core_mode); } static int armv7m_set_core_reg(struct reg *reg, uint8_t *buf) @@ -651,9 +648,7 @@ int armv7m_start_algorithm(struct target *target, /* save previous core mode */ armv7m_algorithm_info->core_mode = core_mode; - retval = target_resume(target, false, entry_point, true, true); - - return retval; + return target_resume(target, false, entry_point, true, true); } /** Waits for an algorithm in the target. */ diff --git a/src/target/armv8.c b/src/target/armv8.c index a369a30418..fca6b8bcee 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -1923,13 +1923,10 @@ struct reg_cache *armv8_build_reg_cache(struct target *target) struct reg *armv8_reg_current(struct arm *arm, unsigned int regnum) { - struct reg *r; - if (regnum > (ARMV8_LAST_REG - 1)) return NULL; - r = arm->core_cache->reg_list + regnum; - return r; + return arm->core_cache->reg_list + regnum; } static void armv8_free_cache(struct reg_cache *cache, bool regs32) @@ -2073,7 +2070,6 @@ int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned tmp |= value & mask; /* write new value */ - retval = mem_ap_write_atomic_u32(armv8->debug_ap, + return mem_ap_write_atomic_u32(armv8->debug_ap, armv8->debug_base + reg, tmp); - return retval; } diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c index 7bf4dcd47b..c6bd779358 100644 --- a/src/target/armv8_cache.c +++ b/src/target/armv8_cache.c @@ -92,8 +92,7 @@ static int armv8_cache_d_inner_clean_inval_all(struct armv8_common *armv8) armv8_cache_d_inner_flush_level(armv8, &cache->arch[cl].d_u_size, cl); } - retval = dpm->finish(dpm); - return retval; + return dpm->finish(dpm); done: LOG_ERROR("clean invalidate failed"); diff --git a/src/target/avr32_ap7k.c b/src/target/avr32_ap7k.c index a2da146c95..73049e1d0d 100644 --- a/src/target/avr32_ap7k.c +++ b/src/target/avr32_ap7k.c @@ -126,16 +126,13 @@ static int avr32_write_core_reg(struct target *target, int num) static int avr32_get_core_reg(struct reg *reg) { - int retval; struct avr32_core_reg *avr32_reg = reg->arch_info; struct target *target = avr32_reg->target; if (target->state != TARGET_HALTED) return ERROR_TARGET_NOT_HALTED; - retval = avr32_read_core_reg(target, avr32_reg->num); - - return retval; + return avr32_read_core_reg(target, avr32_reg->num); } static int avr32_set_core_reg(struct reg *reg, uint8_t *buf) diff --git a/src/target/avr32_regs.c b/src/target/avr32_regs.c index d6fd0e0020..4070e2570f 100644 --- a/src/target/avr32_regs.c +++ b/src/target/avr32_regs.c @@ -31,10 +31,7 @@ static int avr32_jtag_read_reg(struct avr32_jtag *jtag_info, int reg, return retval; } while (!(dcsr & OCDREG_DCSR_CPUD)); - retval = avr32_jtag_nexus_read(jtag_info, - AVR32_OCDREG_DCCPU, val); - - return retval; + return avr32_jtag_nexus_read(jtag_info, AVR32_OCDREG_DCCPU, val); } static int avr32_jtag_write_reg(struct avr32_jtag *jtag_info, int reg, @@ -75,9 +72,7 @@ int avr32_jtag_read_regs(struct avr32_jtag *jtag_info, uint32_t *regs) if (retval != ERROR_OK) return retval; - retval = avr32_jtag_read_reg(jtag_info, 0, regs + AVR32_REG_SR); - - return retval; + return avr32_jtag_read_reg(jtag_info, 0, regs + AVR32_REG_SR); } int avr32_jtag_write_regs(struct avr32_jtag *jtag_info, uint32_t *regs) diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 2efbcce0c9..c0227e1e52 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -451,12 +451,8 @@ static int cortex_a_instr_write_data_r0(struct arm_dpm *dpm, return retval; /* then the opcode, taking data from R0 */ - retval = cortex_a_exec_opcode( - a->armv7a_common.arm.target, - opcode, - &dscr); - - return retval; + return cortex_a_exec_opcode(a->armv7a_common.arm.target, opcode, + &dscr); } static int cortex_a_instr_write_data_r0_r1(struct arm_dpm *dpm, @@ -475,10 +471,8 @@ static int cortex_a_instr_write_data_r0_r1(struct arm_dpm *dpm, return retval; /* then the opcode, taking data from R0, R1 */ - retval = cortex_a_exec_opcode(a->armv7a_common.arm.target, - opcode, - &dscr); - return retval; + return cortex_a_exec_opcode(a->armv7a_common.arm.target, opcode, + &dscr); } static int cortex_a_instr_cpsr_sync(struct arm_dpm *dpm) @@ -602,9 +596,7 @@ static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t, vr, addr); if (retval != ERROR_OK) return retval; - retval = mem_ap_write_atomic_u32(a->armv7a_common.debug_ap, - cr, control); - return retval; + return mem_ap_write_atomic_u32(a->armv7a_common.debug_ap, cr, control); } static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t) @@ -1173,9 +1165,8 @@ static int cortex_a_set_dscr_bits(struct target *target, dscr |= value & bit_mask; /* write new DSCR */ - retval = mem_ap_write_atomic_u32(armv7a->debug_ap, - armv7a->debug_base + CPUDBG_DSCR, dscr); - return retval; + return mem_ap_write_atomic_u32(armv7a->debug_ap, + armv7a->debug_base + CPUDBG_DSCR, dscr); } /* diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c index a989c331ba..6fabb89c9d 100644 --- a/src/target/dsp563xx.c +++ b/src/target/dsp563xx.c @@ -1998,7 +1998,6 @@ static int dsp563xx_remove_custom_watchpoint(struct target *target) COMMAND_HANDLER(dsp563xx_add_watchpoint_command) { - int err = ERROR_OK; struct target *target = get_current_target(CMD_CTX); uint32_t mem_type = 0; @@ -2056,9 +2055,7 @@ COMMAND_HANDLER(dsp563xx_add_watchpoint_command) return ERROR_COMMAND_SYNTAX_ERROR; } - err = dsp563xx_add_custom_watchpoint(target, address, mem_type, rw, cond); - - return err; + return dsp563xx_add_custom_watchpoint(target, address, mem_type, rw, cond); } /* Adding a breakpoint using the once breakpoint logic. diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c index 65efbae324..fc815353cd 100644 --- a/src/target/dsp5680xx.c +++ b/src/target/dsp5680xx.c @@ -31,10 +31,7 @@ static struct dsp5680xx_common dsp5680xx_context; static int dsp5680xx_execute_queue(void) { - int retval; - - retval = jtag_execute_queue(); - return retval; + return jtag_execute_queue(); } /** @@ -54,8 +51,7 @@ static int reset_jtag(void) retval = jtag_execute_queue(); err_check_propagate(retval); jtag_add_pathmove(0, states + 1); - retval = jtag_execute_queue(); - return retval; + return jtag_execute_queue(); } static int dsp5680xx_drscan(struct target *target, uint8_t *d_in, @@ -492,24 +488,16 @@ static int core_move_value_to_pc(struct target *target, uint32_t value) static int eonce_load_tx_rx_to_r0(struct target *target) { - int retval; - - retval = - core_move_long_to_r0(target, + return core_move_long_to_r0(target, ((MC568013_EONCE_TX_RX_ADDR) + (MC568013_EONCE_OBASE_ADDR << 16))); - return retval; } static int core_load_tx_rx_high_addr_to_r0(struct target *target) { - int retval = 0; - - retval = - core_move_long_to_r0(target, + return core_move_long_to_r0(target, ((MC568013_EONCE_TX1_RX1_HIGH_ADDR) + (MC568013_EONCE_OBASE_ADDR << 16))); - return retval; } static int dsp5680xx_read_core_reg(struct target *target, uint8_t reg_addr, @@ -1790,10 +1778,8 @@ static int dsp5680xx_f_signature(struct target *target, uint32_t address, uint32 dsp5680xx_f_ex(target, HFM_CALCULATE_DATA_SIGNATURE, address, words, &hfm_ustat, 1); err_check_propagate(retval); - retval = - dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_DATA, + return dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_DATA, (uint8_t *) signature, 0); - return retval; } int dsp5680xx_f_erase_check(struct target *target, uint8_t *erased, @@ -1853,10 +1839,7 @@ static int erase_sector(struct target *target, int sector, uint16_t *hfm_ustat) */ static int mass_erase(struct target *target, uint16_t *hfm_ustat) { - int retval; - - retval = dsp5680xx_f_ex(target, HFM_MASS_ERASE, 0, 0, hfm_ustat, 1); - return retval; + return dsp5680xx_f_ex(target, HFM_MASS_ERASE, 0, 0, hfm_ustat, 1); } int dsp5680xx_f_erase(struct target *target, int first, int last) @@ -2230,8 +2213,7 @@ int dsp5680xx_f_lock(struct target *target) dsp5680xx_context.debug_mode_enabled = false; tap_cpu->enabled = false; tap_chp->enabled = true; - retval = switch_tap(target, tap_chp, tap_cpu); - return retval; + return switch_tap(target, tap_chp, tap_cpu); } static int dsp5680xx_step(struct target *target, bool current, target_addr_t address, diff --git a/src/target/mips32.c b/src/target/mips32.c index ce51cc9f80..b60ecccd45 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -238,7 +238,6 @@ static const struct { static int mips32_get_core_reg(struct reg *reg) { - int retval; struct mips32_core_reg *mips32_reg = reg->arch_info; struct target *target = mips32_reg->target; struct mips32_common *mips32_target = target_to_mips32(target); @@ -246,9 +245,7 @@ static int mips32_get_core_reg(struct reg *reg) if (target->state != TARGET_HALTED) return ERROR_TARGET_NOT_HALTED; - retval = mips32_target->read_core_reg(target, mips32_reg->num); - - return retval; + return mips32_target->read_core_reg(target, mips32_reg->num); } static int mips32_set_core_reg(struct reg *reg, uint8_t *buf) @@ -770,8 +767,7 @@ static int mips32_configure_ibs(struct target *target) (ejtag_info->ejtag_iba_step_size * i); /* clear IBIS reg */ - retval = target_write_u32(target, ejtag_info->ejtag_ibs_addr, 0); - return retval; + return target_write_u32(target, ejtag_info->ejtag_ibs_addr, 0); } static int mips32_configure_dbs(struct target *target) @@ -797,8 +793,7 @@ static int mips32_configure_dbs(struct target *target) (ejtag_info->ejtag_dba_step_size * i); /* clear DBIS reg */ - retval = target_write_u32(target, ejtag_info->ejtag_dbs_addr, 0); - return retval; + return target_write_u32(target, ejtag_info->ejtag_dbs_addr, 0); } int mips32_configure_break_unit(struct target *target) diff --git a/src/target/mips64.c b/src/target/mips64.c index 0a3ded0aa3..7a225f18ca 100644 --- a/src/target/mips64.c +++ b/src/target/mips64.c @@ -224,7 +224,6 @@ static int reg_type2size(enum reg_type type) static int mips64_get_core_reg(struct reg *reg) { - int retval; struct mips64_core_reg *mips64_reg = reg->arch_info; struct target *target = mips64_reg->target; struct mips64_common *mips64_target = target->arch_info; @@ -232,9 +231,7 @@ static int mips64_get_core_reg(struct reg *reg) if (target->state != TARGET_HALTED) return ERROR_TARGET_NOT_HALTED; - retval = mips64_target->read_core_reg(target, mips64_reg->num); - - return retval; + return mips64_target->read_core_reg(target, mips64_reg->num); } static int mips64_set_core_reg(struct reg *reg, uint8_t *buf) diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c index f401ea9fb5..1b5ce9618d 100644 --- a/src/target/openrisc/or1k_du_adv.c +++ b/src/target/openrisc/or1k_du_adv.c @@ -686,8 +686,7 @@ retry_full_write: bus_error_retries++; if (bus_error_retries > MAX_BUS_ERRORS) { LOG_ERROR("Max WB bus errors reached during burst read"); - retval = ERROR_FAIL; - return retval; + return ERROR_FAIL; } /* Don't call retry_do(), a JTAG reset won't help a WB bus error */ diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 50e0f83dd8..23485d34f6 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -447,9 +447,7 @@ static int increase_dmi_busy_delay(struct target *target) if (res != ERROR_OK) return res; - res = riscv_scan_increase_delay(&info->learned_delays, - RISCV_DELAY_BASE); - return res; + return riscv_scan_increase_delay(&info->learned_delays, RISCV_DELAY_BASE); } static void reset_learned_delays(struct target *target) diff --git a/src/target/stm8.c b/src/target/stm8.c index 3b5d83ff42..7e44237a87 100644 --- a/src/target/stm8.c +++ b/src/target/stm8.c @@ -584,7 +584,6 @@ static int stm8_write_regs(struct target *target, uint32_t regs[]) static int stm8_get_core_reg(struct reg *reg) { - int retval; struct stm8_core_reg *stm8_reg = reg->arch_info; struct target *target = stm8_reg->target; struct stm8_common *stm8 = target_to_stm8(target); @@ -592,9 +591,7 @@ static int stm8_get_core_reg(struct reg *reg) if (target->state != TARGET_HALTED) return ERROR_TARGET_NOT_HALTED; - retval = stm8->read_core_reg(target, stm8_reg->num); - - return retval; + return stm8->read_core_reg(target, stm8_reg->num); } static int stm8_set_core_reg(struct reg *reg, uint8_t *buf) diff --git a/src/target/target.c b/src/target/target.c index f766d1da43..bc346a414c 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -2275,7 +2275,6 @@ void target_quit(void) int target_arch_state(struct target *target) { - int retval; if (!target) { LOG_WARNING("No target has been configured"); return ERROR_OK; @@ -2284,8 +2283,7 @@ int target_arch_state(struct target *target) if (target->state != TARGET_HALTED) return ERROR_OK; - retval = target->type->arch_state(target); - return retval; + return target->type->arch_state(target); } static int target_get_gdb_fileio_info_default(struct target *target, diff --git a/src/target/xscale.c b/src/target/xscale.c index 712db4ee2a..fb901a3a49 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -2027,8 +2027,7 @@ static int xscale_disable_mmu_caches(struct target *target, int mmu, return retval; /* execute cpwait to ensure outstanding operations complete */ - retval = xscale_send_u32(target, 0x53); - return retval; + return xscale_send_u32(target, 0x53); } static int xscale_enable_mmu_caches(struct target *target, int mmu, @@ -2059,8 +2058,7 @@ static int xscale_enable_mmu_caches(struct target *target, int mmu, return retval; /* execute cpwait to ensure outstanding operations complete */ - retval = xscale_send_u32(target, 0x53); - return retval; + return xscale_send_u32(target, 0x53); } static int xscale_set_breakpoint(struct target *target, --
