> Subject: Re: [PATCH/RFC] IB/ipoib: add selective tx signaling
>
> > netif_queue_stopped is an atomic, I think that would be sufficient, no?
>
> netif_queue_stopped does test_bit(), which is an implicit memory
> barrier. But I think it's pretty subtle -- you have to look at every
> place tx_head and tx_tail are updated and decide if there needs to be
> a corresponding barrier.
I certainly agree it is subtle.
> For example, in:
>
> + if (netif_queue_stopped(dev) &&
> + priv->tx_head - priv->tx_tail < ipoib_sendq_size) {
>
> there is a barrier in netif_queue_stopped() but no control in what
> order tx_head and tx_tail are read...
In this case, I think its fine since tx_tail is only updated in the
completion handler.
--
MST
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