Quoting r. Roland Dreier <[EMAIL PROTECTED]>: > Subject: Re: [PATCH] IB/ipoib: DMA alignment on ppc64 > > I don't think this is what's needed. The GRH leaves a gap of 40, so > getting rid of the skb_reserve() just means that DMA will start at an > offset of 40 rather than 44.
Ugh. Correct - unless the GRH is present in the incoming packet - which we probably need not optimize for for now. > I think you need to reserve enough to get to a full cacheline > boundary, but I can't remember if that's 64 or 128 bytes. L1_CACHE_BYTES? Hmm. How about we add a S/G entry to put both the GRH *and* the IPoIB encap in a separate chunk (which we can then ignore)? -- MST _______________________________________________ openib-general mailing list [email protected] http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
