Hi all, There has been sustained interest in, and responsive contributors for, RISC-V support in NumPy. There are now self-hosted runners from the RISE project (https://riseproject.dev/), which we're about to get green (I hope) on https://github.com/numpy/numpy/pull/30995.
Their interest extends to adding RISC-V as a supported platform for which we ship wheels on PyPI - see https://github.com/numpy/numpy/issues/30216. It seems a little too early to consider crossing that bridge today, but it's an up-and-coming platform so it's fairly likely that we'll consider it in the future I'd think. For now, I propose we add RISC-V as a Tier 3 platform at https://numpy.org/neps/nep-0057-numpy-platform-support.html#tier-3, next to ppc64le and Pyodide. That means we have CI support and contributors who have stuck up their hand and can be pinged in case of platform-specific issues that need addressing. We also have SIMD and CPU detection code specific to RISC-V, so having native runners in CI will be quite helpful either way. And hopefully we can disable the slow QEMU-based job once we're happy with the self-hosted runners. Thoughts or concerns? Cheers, Ralf
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