This register read is not required in order to bring up any of the GPUs, and it is read too early on Hopper/Blackwell+ GPUs anyway. So just stop doing this.
Signed-off-by: John Hubbard <[email protected]> --- This applies cleanly to today's drm-rust-next. thanks, John Hubbard drivers/gpu/nova-core/falcon.rs | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs index 3f505b870601..ac55cbc5ac1e 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -371,11 +371,6 @@ pub(crate) fn new( bar: &Bar0, need_riscv: bool, ) -> Result<Self> { - let hwcfg1 = regs::NV_PFALCON_FALCON_HWCFG1::read(bar, &E::ID); - // Check that the revision and security model contain valid values. - let _ = hwcfg1.core_rev()?; - let _ = hwcfg1.security_model()?; - if need_riscv { let hwcfg2 = regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID); if !hwcfg2.riscv() { base-commit: d3917368ebc5cd89d7d08eab4673e5c4c73ff42f -- 2.51.1
