Måns Rullgård <m...@mansr.com> writes: > Mason <slash....@free.fr> writes: > >> [ CCing a few knowledgeable people ] >> >> Despite the subject, this is about an Atheros 8035 PHY :-) >> >> On 12/11/2015 15:04, Måns Rullgård wrote: >> >>> Mason wrote: >>> >>>> BTW, you're not using the PHY IRQ, right? I think I remember you saying >>>> it didn't work reliably? >>> >>> It doesn't seem to be wired up on any of my boards, or there's some >>> magic required to activate it that I'm unaware of. >> >> Weird. The board schematics for the 1172 show Tango ETH0_MDINT# pin >> properly connected to AR8035 INT pin (pin 20). > > I have a different board. > >> <Thinking out loud> >> >> http://www.redeszone.net/app/uploads/2014/04/AR8035.pdf >> >> INT pin 20 >> I/O, D, PD >> Interrupt Signal to System; default OD-gate, needs an external >> 10Kohm pull-up, active low; can be configured to I/O by register, >> active high. >> >> 4.1.17 Interrupt Enable >> Offset: 0x12 >> Mode: Read/Write >> Hardware Reset: 0 >> >> Strange... it looks like AT803X_INER and AT803X_INTR_ENABLE refer to >> the same "Interrupt Enable" register? > > Seems like someone missed that it was already defined. > >> In fact, AT803X_INER_INIT == 0xec00 makes sense for register 0x12: >> link success/fail, speed/duplex changed, autoneg error >> >> Looks like at803x_config_intr() is used for 8031, but not for 8035... >> >> Relevant commit: >> 77a9939426f7a "phy/at8031: enable at8031 to work on interrupt mode" >> >> If I add .config_intr and .ack_interrupt to the 8035 struct, then I get >> (also added some traces) > > I tried that just now, and I get nothing. What interrupt did you > specify in your device tree?
It works with the interrupt set to trigger on rising edge. -- Måns Rullgård m...@mansr.com -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
