On Thu, Jan 24, 2008 at 10:24:13AM +0530, Poonam_Aggrwal-b10812 wrote: > + ix) Baud Rate Generator (BRG) > + > + Required properties: > + - compatible : shpuld be "fsl,cpm-brg" > + - fsl,brg-sources : define the input clock for all 16 BRGs. The input > + clock source could be 1 to 24 for CLK1 to CLK24. Zero means that the > + particular BRG will be driven by QE clock(BRGCLK).
Should also have a clock-frequency property to specify what BRGCLK is. -Scott -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
